1 ac0e2db6 2004-04-21 devnull /*
 2 ac0e2db6 2004-04-21 devnull  *	mpvecdigmul(mpdigit *b, int n, mpdigit m, mpdigit *p)
 3 ac0e2db6 2004-04-21 devnull  *
 4 ac0e2db6 2004-04-21 devnull  *	p += b*m
 5 ac0e2db6 2004-04-21 devnull  *
 6 ac0e2db6 2004-04-21 devnull  *	each step look like:
 7 ac0e2db6 2004-04-21 devnull  *		hi,lo = m*b[i]
 8 ac0e2db6 2004-04-21 devnull  *		lo += oldhi + carry
 9 ac0e2db6 2004-04-21 devnull  *		hi += carry
10 ac0e2db6 2004-04-21 devnull  *		p[i] += lo
11 ac0e2db6 2004-04-21 devnull  *		oldhi = hi
12 ac0e2db6 2004-04-21 devnull  *
13 ac0e2db6 2004-04-21 devnull  *	the registers are:
14 ac0e2db6 2004-04-21 devnull  *		hi = DX		- constrained by hardware
15 ac0e2db6 2004-04-21 devnull  *		lo = AX		- constrained by hardware
16 ac0e2db6 2004-04-21 devnull  *		b+n = SI	- can't be BP
17 ac0e2db6 2004-04-21 devnull  *		p+n = DI	- can't be BP
18 ac0e2db6 2004-04-21 devnull  *		i-n = BP
19 ac0e2db6 2004-04-21 devnull  *		m = BX
20 ac0e2db6 2004-04-21 devnull  *		oldhi = CX
21 ac0e2db6 2004-04-21 devnull  *		
22 ac0e2db6 2004-04-21 devnull  */
23 ac0e2db6 2004-04-21 devnull .text
24 ac0e2db6 2004-04-21 devnull 
25 ac0e2db6 2004-04-21 devnull .p2align 2,0x90
26 ac0e2db6 2004-04-21 devnull .globl mpvecdigmuladd
27 ac0e2db6 2004-04-21 devnull mpvecdigmuladd:
28 ac0e2db6 2004-04-21 devnull 	/* Prelude */
29 39ce0d58 2006-03-22 devnull 	pushl %ebp		/* save on stack */
30 39ce0d58 2006-03-22 devnull 	pushl %ebx
31 39ce0d58 2006-03-22 devnull 	pushl %esi
32 39ce0d58 2006-03-22 devnull 	pushl %edi
33 ac0e2db6 2004-04-21 devnull 
34 39ce0d58 2006-03-22 devnull 	leal 20(%esp), %ebp		/* %ebp = FP for now */
35 39ce0d58 2006-03-22 devnull 	movl	0(%ebp), %esi		/* b */
36 39ce0d58 2006-03-22 devnull 	movl	4(%ebp), %ecx		/* n */
37 39ce0d58 2006-03-22 devnull 	movl	8(%ebp), %ebx		/* m */
38 39ce0d58 2006-03-22 devnull 	movl	12(%ebp), %edi		/* p */
39 ac0e2db6 2004-04-21 devnull 	movl	%ecx, %ebp
40 ac0e2db6 2004-04-21 devnull 	negl	%ebp			/* BP = -n */
41 ac0e2db6 2004-04-21 devnull 	shll	$2, %ecx
42 ac0e2db6 2004-04-21 devnull 	addl	%ecx, %esi		/* SI = b + n */
43 ac0e2db6 2004-04-21 devnull 	addl	%ecx, %edi		/* DI = p + n */
44 ac0e2db6 2004-04-21 devnull 	xorl	%ecx, %ecx
45 ac0e2db6 2004-04-21 devnull _muladdloop:
46 ac0e2db6 2004-04-21 devnull 	movl	(%esi, %ebp, 4), %eax	/* lo = b[i] */
47 ac0e2db6 2004-04-21 devnull 	mull	%ebx			/* hi, lo = b[i] * m */
48 ac0e2db6 2004-04-21 devnull 	addl	%ecx,%eax		/* lo += oldhi */
49 ac0e2db6 2004-04-21 devnull 	jae	_muladdnocarry1
50 ac0e2db6 2004-04-21 devnull 	incl	%edx			/* hi += carry */
51 ac0e2db6 2004-04-21 devnull _muladdnocarry1:
52 ac0e2db6 2004-04-21 devnull 	addl	%eax, (%edi, %ebp, 4)	/* p[i] += lo */
53 ac0e2db6 2004-04-21 devnull 	jae	_muladdnocarry2
54 ac0e2db6 2004-04-21 devnull 	incl	%edx			/* hi += carry */
55 ac0e2db6 2004-04-21 devnull _muladdnocarry2:
56 ac0e2db6 2004-04-21 devnull 	movl	%edx, %ecx		/* oldhi = hi */
57 ac0e2db6 2004-04-21 devnull 	incl	%ebp			/* i++ */
58 ac0e2db6 2004-04-21 devnull 	jnz	_muladdloop
59 ac0e2db6 2004-04-21 devnull 	xorl	%eax, %eax
60 ac0e2db6 2004-04-21 devnull 	addl	%ecx, (%edi, %ebp, 4)	/* p[n] + oldhi */
61 ac0e2db6 2004-04-21 devnull 	adcl	%eax, %eax		/* return carry out of p[n] */
62 ac0e2db6 2004-04-21 devnull 
63 ac0e2db6 2004-04-21 devnull 	/* Postlude */
64 39ce0d58 2006-03-22 devnull 	popl %edi
65 39ce0d58 2006-03-22 devnull 	popl %esi
66 39ce0d58 2006-03-22 devnull 	popl %ebx
67 39ce0d58 2006-03-22 devnull 	popl %ebp
68 ac0e2db6 2004-04-21 devnull 	ret
69 39ce0d58 2006-03-22 devnull