1 a0d146ed 2005-07-12 devnull #ifdef PLAN9PORT
  2 a0d146ed 2005-07-12 devnull #include <u.h>
  3 a0d146ed 2005-07-12 devnull #include <signal.h>
  4 a0d146ed 2005-07-12 devnull #endif
  5 a0d146ed 2005-07-12 devnull #include "stdinc.h"
  6 a0d146ed 2005-07-12 devnull #include "dat.h"
  7 a0d146ed 2005-07-12 devnull #include "fns.h"
  8 a0d146ed 2005-07-12 devnull 
  9 a0d146ed 2005-07-12 devnull #include "whack.h"
 10 a0d146ed 2005-07-12 devnull 
 11 a0d146ed 2005-07-12 devnull int debug;
 12 a0d146ed 2005-07-12 devnull int nofork;
 13 a0d146ed 2005-07-12 devnull int mainstacksize = 256*1024;
 14 a0d146ed 2005-07-12 devnull VtSrv *ventisrv;
 15 a0d146ed 2005-07-12 devnull 
 16 a0d146ed 2005-07-12 devnull static void	ventiserver(void*);
 17 a0d146ed 2005-07-12 devnull 
 18 a0d146ed 2005-07-12 devnull void
 19 a0d146ed 2005-07-12 devnull usage(void)
 20 a0d146ed 2005-07-12 devnull {
 21 9ee00732 2011-06-07 rsc 	fprint(2, "usage: venti [-Ldrs] [-a address] [-B blockcachesize] [-c config] "
 22 9ee00732 2011-06-07 rsc "[-C lumpcachesize] [-h httpaddress] [-I indexcachesize] [-W webroot]\n");
 23 a0d146ed 2005-07-12 devnull 	threadexitsall("usage");
 24 b3a20a96 2020-12-30 rsc }
 25 b3a20a96 2020-12-30 rsc 
 26 b3a20a96 2020-12-30 rsc int
 27 b3a20a96 2020-12-30 rsc threadmaybackground(void)
 28 b3a20a96 2020-12-30 rsc {
 29 b3a20a96 2020-12-30 rsc 	return 1;
 30 a0d146ed 2005-07-12 devnull }
 31 1e0c0383 2011-11-08 rsc 
 32 a0d146ed 2005-07-12 devnull void
 33 a0d146ed 2005-07-12 devnull threadmain(int argc, char *argv[])
 34 a0d146ed 2005-07-12 devnull {
 35 a0d146ed 2005-07-12 devnull 	char *configfile, *haddr, *vaddr, *webroot;
 36 a0d146ed 2005-07-12 devnull 	u32int mem, icmem, bcmem, minbcmem;
 37 a0d146ed 2005-07-12 devnull 	Config config;
 38 a0d146ed 2005-07-12 devnull 
 39 a0d146ed 2005-07-12 devnull 	traceinit();
 40 a0d146ed 2005-07-12 devnull 	threadsetname("main");
 41 a0d146ed 2005-07-12 devnull 	vaddr = nil;
 42 a0d146ed 2005-07-12 devnull 	haddr = nil;
 43 a0d146ed 2005-07-12 devnull 	configfile = nil;
 44 a0d146ed 2005-07-12 devnull 	webroot = nil;
 45 a0d146ed 2005-07-12 devnull 	mem = 0;
 46 a0d146ed 2005-07-12 devnull 	icmem = 0;
 47 a0d146ed 2005-07-12 devnull 	bcmem = 0;
 48 a0d146ed 2005-07-12 devnull 	ARGBEGIN{
 49 a0d146ed 2005-07-12 devnull 	case 'a':
 50 a0d146ed 2005-07-12 devnull 		vaddr = EARGF(usage());
 51 a0d146ed 2005-07-12 devnull 		break;
 52 a0d146ed 2005-07-12 devnull 	case 'B':
 53 a0d146ed 2005-07-12 devnull 		bcmem = unittoull(EARGF(usage()));
 54 a0d146ed 2005-07-12 devnull 		break;
 55 a0d146ed 2005-07-12 devnull 	case 'c':
 56 a0d146ed 2005-07-12 devnull 		configfile = EARGF(usage());
 57 a0d146ed 2005-07-12 devnull 		break;
 58 a0d146ed 2005-07-12 devnull 	case 'C':
 59 a0d146ed 2005-07-12 devnull 		mem = unittoull(EARGF(usage()));
 60 a0d146ed 2005-07-12 devnull 		break;
 61 a0d146ed 2005-07-12 devnull 	case 'D':
 62 a0d146ed 2005-07-12 devnull 		settrace(EARGF(usage()));
 63 a0d146ed 2005-07-12 devnull 		break;
 64 a0d146ed 2005-07-12 devnull 	case 'd':
 65 a0d146ed 2005-07-12 devnull 		debug = 1;
 66 a0d146ed 2005-07-12 devnull 		nofork = 1;
 67 a0d146ed 2005-07-12 devnull 		break;
 68 a0d146ed 2005-07-12 devnull 	case 'h':
 69 a0d146ed 2005-07-12 devnull 		haddr = EARGF(usage());
 70 a0d146ed 2005-07-12 devnull 		break;
 71 a0d146ed 2005-07-12 devnull 	case 'I':
 72 a0d146ed 2005-07-12 devnull 		icmem = unittoull(EARGF(usage()));
 73 a0d146ed 2005-07-12 devnull 		break;
 74 a0d146ed 2005-07-12 devnull 	case 'L':
 75 a0d146ed 2005-07-12 devnull 		ventilogging = 1;
 76 a0d146ed 2005-07-12 devnull 		break;
 77 0e263387 2007-05-03 devnull 	case 'r':
 78 0e263387 2007-05-03 devnull 		readonly = 1;
 79 0e263387 2007-05-03 devnull 		break;
 80 a0d146ed 2005-07-12 devnull 	case 's':
 81 a0d146ed 2005-07-12 devnull 		nofork = 1;
 82 a0d146ed 2005-07-12 devnull 		break;
 83 7a400ee9 2007-09-25 rsc 	case 'w':			/* compatibility with old venti */
 84 7a400ee9 2007-09-25 rsc 		queuewrites = 1;
 85 7a400ee9 2007-09-25 rsc 		break;
 86 a0d146ed 2005-07-12 devnull 	case 'W':
 87 a0d146ed 2005-07-12 devnull 		webroot = EARGF(usage());
 88 a0d146ed 2005-07-12 devnull 		break;
 89 a0d146ed 2005-07-12 devnull 	default:
 90 a0d146ed 2005-07-12 devnull 		usage();
 91 a0d146ed 2005-07-12 devnull 	}ARGEND
 92 a0d146ed 2005-07-12 devnull 
 93 a0d146ed 2005-07-12 devnull 	if(argc)
 94 a0d146ed 2005-07-12 devnull 		usage();
 95 a0d146ed 2005-07-12 devnull 
 96 a0d146ed 2005-07-12 devnull 	if(!nofork)
 97 a0d146ed 2005-07-12 devnull 		rfork(RFNOTEG);
 98 a0d146ed 2005-07-12 devnull 
 99 a0d146ed 2005-07-12 devnull #ifdef PLAN9PORT
100 a0d146ed 2005-07-12 devnull 	{
101 a0d146ed 2005-07-12 devnull 		/* sigh - needed to avoid signals when writing to hungup networks */
102 a0d146ed 2005-07-12 devnull 		struct sigaction sa;
103 a0d146ed 2005-07-12 devnull 		memset(&sa, 0, sizeof sa);
104 a0d146ed 2005-07-12 devnull 		sa.sa_handler = SIG_IGN;
105 a0d146ed 2005-07-12 devnull 		sigaction(SIGPIPE, &sa, nil);
106 a0d146ed 2005-07-12 devnull 	}
107 a0d146ed 2005-07-12 devnull #endif
108 a0d146ed 2005-07-12 devnull 
109 7e452401 2007-04-27 devnull 	ventifmtinstall();
110 a0d146ed 2005-07-12 devnull 	trace(TraceQuiet, "venti started");
111 7e452401 2007-04-27 devnull 	fprint(2, "%T venti: ");
112 a0d146ed 2005-07-12 devnull 
113 a0d146ed 2005-07-12 devnull 	if(configfile == nil)
114 a0d146ed 2005-07-12 devnull 		configfile = "venti.conf";
115 a0d146ed 2005-07-12 devnull 
116 a0d146ed 2005-07-12 devnull 	fprint(2, "conf...");
117 a0d146ed 2005-07-12 devnull 	if(initventi(configfile, &config) < 0)
118 a0d146ed 2005-07-12 devnull 		sysfatal("can't init server: %r");
119 f5a8ea6f 2011-06-02 rsc 	/*
120 f5a8ea6f 2011-06-02 rsc 	 * load bloom filter
121 f5a8ea6f 2011-06-02 rsc 	 */
122 28b49df3 2006-07-18 devnull 	if(mainindex->bloom && loadbloom(mainindex->bloom) < 0)
123 28b49df3 2006-07-18 devnull 		sysfatal("can't load bloom filter: %r");
124 a0d146ed 2005-07-12 devnull 
125 a0d146ed 2005-07-12 devnull 	if(mem == 0)
126 a0d146ed 2005-07-12 devnull 		mem = config.mem;
127 a0d146ed 2005-07-12 devnull 	if(bcmem == 0)
128 a0d146ed 2005-07-12 devnull 		bcmem = config.bcmem;
129 a0d146ed 2005-07-12 devnull 	if(icmem == 0)
130 a0d146ed 2005-07-12 devnull 		icmem = config.icmem;
131 a0d146ed 2005-07-12 devnull 	if(haddr == nil)
132 a0d146ed 2005-07-12 devnull 		haddr = config.haddr;
133 a0d146ed 2005-07-12 devnull 	if(vaddr == nil)
134 a0d146ed 2005-07-12 devnull 		vaddr = config.vaddr;
135 a0d146ed 2005-07-12 devnull 	if(vaddr == nil)
136 a0d146ed 2005-07-12 devnull 		vaddr = "tcp!*!venti";
137 a0d146ed 2005-07-12 devnull 	if(webroot == nil)
138 a0d146ed 2005-07-12 devnull 		webroot = config.webroot;
139 a0d146ed 2005-07-12 devnull 	if(queuewrites == 0)
140 a0d146ed 2005-07-12 devnull 		queuewrites = config.queuewrites;
141 a0d146ed 2005-07-12 devnull 
142 a0d146ed 2005-07-12 devnull 	if(haddr){
143 a0d146ed 2005-07-12 devnull 		fprint(2, "httpd %s...", haddr);
144 a0d146ed 2005-07-12 devnull 		if(httpdinit(haddr, webroot) < 0)
145 a0d146ed 2005-07-12 devnull 			fprint(2, "warning: can't start http server: %r");
146 a0d146ed 2005-07-12 devnull 	}
147 a0d146ed 2005-07-12 devnull 	fprint(2, "init...");
148 a0d146ed 2005-07-12 devnull 
149 a0d146ed 2005-07-12 devnull 	if(mem == 0xffffffffUL)
150 a0d146ed 2005-07-12 devnull 		mem = 1 * 1024 * 1024;
151 f5a8ea6f 2011-06-02 rsc 
152 f5a8ea6f 2011-06-02 rsc 	/*
153 f5a8ea6f 2011-06-02 rsc 	 * lump cache
154 f5a8ea6f 2011-06-02 rsc 	 */
155 a0d146ed 2005-07-12 devnull 	if(0) fprint(2, "initialize %d bytes of lump cache for %d lumps\n",
156 a0d146ed 2005-07-12 devnull 		mem, mem / (8 * 1024));
157 a0d146ed 2005-07-12 devnull 	initlumpcache(mem, mem / (8 * 1024));
158 a0d146ed 2005-07-12 devnull 
159 f5a8ea6f 2011-06-02 rsc 	/*
160 f5a8ea6f 2011-06-02 rsc 	 * index cache
161 f5a8ea6f 2011-06-02 rsc 	 */
162 7a400ee9 2007-09-25 rsc 	initicache(icmem);
163 a0d146ed 2005-07-12 devnull 	initicachewrite();
164 a0d146ed 2005-07-12 devnull 
165 a0d146ed 2005-07-12 devnull 	/*
166 f5a8ea6f 2011-06-02 rsc 	 * block cache: need a block for every arena and every process
167 a0d146ed 2005-07-12 devnull 	 */
168 fa325e9b 2020-01-10 cross 	minbcmem = maxblocksize *
169 a0d146ed 2005-07-12 devnull 		(mainindex->narenas + mainindex->nsects*4 + 16);
170 a0d146ed 2005-07-12 devnull 	if(bcmem < minbcmem)
171 a0d146ed 2005-07-12 devnull 		bcmem = minbcmem;
172 a0d146ed 2005-07-12 devnull 	if(0) fprint(2, "initialize %d bytes of disk block cache\n", bcmem);
173 a0d146ed 2005-07-12 devnull 	initdcache(bcmem);
174 a0d146ed 2005-07-12 devnull 
175 a0d146ed 2005-07-12 devnull 	if(mainindex->bloom)
176 a0d146ed 2005-07-12 devnull 		startbloomproc(mainindex->bloom);
177 a0d146ed 2005-07-12 devnull 
178 a0d146ed 2005-07-12 devnull 	fprint(2, "sync...");
179 45ac814c 2007-10-29 rsc 	if(!readonly && syncindex(mainindex) < 0)
180 a0d146ed 2005-07-12 devnull 		sysfatal("can't sync server: %r");
181 a0d146ed 2005-07-12 devnull 
182 0e263387 2007-05-03 devnull 	if(!readonly && queuewrites){
183 a0d146ed 2005-07-12 devnull 		fprint(2, "queue...");
184 a0d146ed 2005-07-12 devnull 		if(initlumpqueues(mainindex->nsects) < 0){
185 a0d146ed 2005-07-12 devnull 			fprint(2, "can't initialize lump queues,"
186 a0d146ed 2005-07-12 devnull 				" disabling write queueing: %r");
187 a0d146ed 2005-07-12 devnull 			queuewrites = 0;
188 a0d146ed 2005-07-12 devnull 		}
189 a0d146ed 2005-07-12 devnull 	}
190 a0d146ed 2005-07-12 devnull 
191 7a400ee9 2007-09-25 rsc 	if(initarenasum() < 0)
192 7a400ee9 2007-09-25 rsc 		fprint(2, "warning: can't initialize arena summing process: %r");
193 7a400ee9 2007-09-25 rsc 
194 a0d146ed 2005-07-12 devnull 	fprint(2, "announce %s...", vaddr);
195 a0d146ed 2005-07-12 devnull 	ventisrv = vtlisten(vaddr);
196 a0d146ed 2005-07-12 devnull 	if(ventisrv == nil)
197 a0d146ed 2005-07-12 devnull 		sysfatal("can't announce %s: %r", vaddr);
198 a0d146ed 2005-07-12 devnull 
199 a0d146ed 2005-07-12 devnull 	fprint(2, "serving.\n");
200 a0d146ed 2005-07-12 devnull 	if(nofork)
201 a0d146ed 2005-07-12 devnull 		ventiserver(nil);
202 a0d146ed 2005-07-12 devnull 	else
203 a0d146ed 2005-07-12 devnull 		vtproc(ventiserver, nil);
204 f5a8ea6f 2011-06-02 rsc 
205 f5a8ea6f 2011-06-02 rsc 	threadexits(nil);
206 a0d146ed 2005-07-12 devnull }
207 a0d146ed 2005-07-12 devnull 
208 a0d146ed 2005-07-12 devnull static void
209 a0d146ed 2005-07-12 devnull vtrerror(VtReq *r, char *error)
210 a0d146ed 2005-07-12 devnull {
211 a0d146ed 2005-07-12 devnull 	r->rx.msgtype = VtRerror;
212 a0d146ed 2005-07-12 devnull 	r->rx.error = estrdup(error);
213 a0d146ed 2005-07-12 devnull }
214 a0d146ed 2005-07-12 devnull 
215 a0d146ed 2005-07-12 devnull static void
216 a0d146ed 2005-07-12 devnull ventiserver(void *v)
217 a0d146ed 2005-07-12 devnull {
218 a0d146ed 2005-07-12 devnull 	Packet *p;
219 a0d146ed 2005-07-12 devnull 	VtReq *r;
220 a0d146ed 2005-07-12 devnull 	char err[ERRMAX];
221 a0d146ed 2005-07-12 devnull 	uint ms;
222 a0d146ed 2005-07-12 devnull 	int cached, ok;
223 a0d146ed 2005-07-12 devnull 
224 a0d146ed 2005-07-12 devnull 	USED(v);
225 a0d146ed 2005-07-12 devnull 	threadsetname("ventiserver");
226 a0d146ed 2005-07-12 devnull 	trace(TraceWork, "start");
227 a0d146ed 2005-07-12 devnull 	while((r = vtgetreq(ventisrv)) != nil){
228 a0d146ed 2005-07-12 devnull 		trace(TraceWork, "finish");
229 a0d146ed 2005-07-12 devnull 		trace(TraceWork, "start request %F", &r->tx);
230 a0d146ed 2005-07-12 devnull 		trace(TraceRpc, "<- %F", &r->tx);
231 a0d146ed 2005-07-12 devnull 		r->rx.msgtype = r->tx.msgtype+1;
232 a0d146ed 2005-07-12 devnull 		addstat(StatRpcTotal, 1);
233 28b49df3 2006-07-18 devnull 		if(0) print("req (arenas[0]=%p sects[0]=%p) %F\n",
234 28b49df3 2006-07-18 devnull 			mainindex->arenas[0], mainindex->sects[0], &r->tx);
235 a0d146ed 2005-07-12 devnull 		switch(r->tx.msgtype){
236 a0d146ed 2005-07-12 devnull 		default:
237 a0d146ed 2005-07-12 devnull 			vtrerror(r, "unknown request");
238 a0d146ed 2005-07-12 devnull 			break;
239 a0d146ed 2005-07-12 devnull 		case VtTread:
240 a0d146ed 2005-07-12 devnull 			ms = msec();
241 a0d146ed 2005-07-12 devnull 			r->rx.data = readlump(r->tx.score, r->tx.blocktype, r->tx.count, &cached);
242 a0d146ed 2005-07-12 devnull 			ms = msec() - ms;
243 a0d146ed 2005-07-12 devnull 			addstat2(StatRpcRead, 1, StatRpcReadTime, ms);
244 a0d146ed 2005-07-12 devnull 			if(r->rx.data == nil){
245 a0d146ed 2005-07-12 devnull 				addstat(StatRpcReadFail, 1);
246 a0d146ed 2005-07-12 devnull 				rerrstr(err, sizeof err);
247 a0d146ed 2005-07-12 devnull 				vtrerror(r, err);
248 a0d146ed 2005-07-12 devnull 			}else{
249 a0d146ed 2005-07-12 devnull 				addstat(StatRpcReadBytes, packetsize(r->rx.data));
250 a0d146ed 2005-07-12 devnull 				addstat(StatRpcReadOk, 1);
251 a0d146ed 2005-07-12 devnull 				if(cached)
252 a0d146ed 2005-07-12 devnull 					addstat2(StatRpcReadCached, 1, StatRpcReadCachedTime, ms);
253 a0d146ed 2005-07-12 devnull 				else
254 a0d146ed 2005-07-12 devnull 					addstat2(StatRpcReadUncached, 1, StatRpcReadUncachedTime, ms);
255 a0d146ed 2005-07-12 devnull 			}
256 a0d146ed 2005-07-12 devnull 			break;
257 a0d146ed 2005-07-12 devnull 		case VtTwrite:
258 0e263387 2007-05-03 devnull 			if(readonly){
259 0e263387 2007-05-03 devnull 				vtrerror(r, "read only");
260 0e263387 2007-05-03 devnull 				break;
261 0e263387 2007-05-03 devnull 			}
262 a0d146ed 2005-07-12 devnull 			p = r->tx.data;
263 a0d146ed 2005-07-12 devnull 			r->tx.data = nil;
264 a0d146ed 2005-07-12 devnull 			addstat(StatRpcWriteBytes, packetsize(p));
265 a0d146ed 2005-07-12 devnull 			ms = msec();
266 a0d146ed 2005-07-12 devnull 			ok = writelump(p, r->rx.score, r->tx.blocktype, 0, ms);
267 a0d146ed 2005-07-12 devnull 			ms = msec() - ms;
268 a0d146ed 2005-07-12 devnull 			addstat2(StatRpcWrite, 1, StatRpcWriteTime, ms);
269 a0d146ed 2005-07-12 devnull 
270 a0d146ed 2005-07-12 devnull 			if(ok < 0){
271 a0d146ed 2005-07-12 devnull 				addstat(StatRpcWriteFail, 1);
272 a0d146ed 2005-07-12 devnull 				rerrstr(err, sizeof err);
273 a0d146ed 2005-07-12 devnull 				vtrerror(r, err);
274 a0d146ed 2005-07-12 devnull 			}
275 a0d146ed 2005-07-12 devnull 			break;
276 a0d146ed 2005-07-12 devnull 		case VtTsync:
277 a0d146ed 2005-07-12 devnull 			flushqueue();
278 a0d146ed 2005-07-12 devnull 			flushdcache();
279 a0d146ed 2005-07-12 devnull 			break;
280 a0d146ed 2005-07-12 devnull 		}
281 a0d146ed 2005-07-12 devnull 		trace(TraceRpc, "-> %F", &r->rx);
282 a0d146ed 2005-07-12 devnull 		vtrespond(r);
283 a0d146ed 2005-07-12 devnull 		trace(TraceWork, "start");
284 a0d146ed 2005-07-12 devnull 	}
285 a0d146ed 2005-07-12 devnull 	flushdcache();
286 a0d146ed 2005-07-12 devnull 	flushicache();
287 a0d146ed 2005-07-12 devnull 	threadexitsall(0);
288 a0d146ed 2005-07-12 devnull }