10 #define REGOFF(x) (ulong)(&((struct Ureg *) 0)->x)
12 #define REGSIZE sizeof(struct Ureg)
13 #define FP_CTL(x) (REGSIZE+4*(x))
14 #define FP_REG(x) (FP_CTL(7)+10*(x))
15 #define FPREGSIZE (6*4+8*10)
18 * i386-specific debugger interface
21 static char *i386excep(Map*, Regs*);
24 static int i386trace(Map*, ulong, ulong, ulong, Tracer);
25 static ulong i386frame(Map*, ulong, ulong, ulong, ulong);
27 static int i386foll(Map*, Regs*, ulong, ulong*);
28 static int i386hexinst(Map*, ulong, char*, int);
29 static int i386das(Map*, ulong, char, char*, int);
30 static int i386instlen(Map*, ulong);
31 static char *i386windregs[];
32 static int i386unwind(Map*, Regs*, ulong*);
34 static Regdesc i386reglist[] = {
35 {"DI", REGOFF(di), RINT, 'X'},
36 {"SI", REGOFF(si), RINT, 'X'},
37 {"BP", REGOFF(bp), RINT, 'X'},
38 {"BX", REGOFF(bx), RINT, 'X'},
39 {"DX", REGOFF(dx), RINT, 'X'},
40 {"CX", REGOFF(cx), RINT, 'X'},
41 {"AX", REGOFF(ax), RINT, 'X'},
42 {"GS", REGOFF(gs), RINT, 'X'},
43 {"FS", REGOFF(fs), RINT, 'X'},
44 {"ES", REGOFF(es), RINT, 'X'},
45 {"DS", REGOFF(ds), RINT, 'X'},
46 {"TRAP", REGOFF(trap), RINT, 'X'},
47 {"ECODE", REGOFF(ecode), RINT, 'X'},
48 {"PC", REGOFF(pc), RINT, 'X'},
49 {"CS", REGOFF(cs), RINT, 'X'},
50 {"EFLAGS", REGOFF(flags), RINT, 'X'},
51 {"SP", REGOFF(sp), RINT, 'X'},
52 {"SS", REGOFF(ss), RINT, 'X'},
54 {"E0", FP_CTL(0), RFLT, 'X'},
55 {"E1", FP_CTL(1), RFLT, 'X'},
56 {"E2", FP_CTL(2), RFLT, 'X'},
57 {"E3", FP_CTL(3), RFLT, 'X'},
58 {"E4", FP_CTL(4), RFLT, 'X'},
59 {"E5", FP_CTL(5), RFLT, 'X'},
60 {"E6", FP_CTL(6), RFLT, 'X'},
61 {"F0", FP_REG(7), RFLT, '3'},
62 {"F1", FP_REG(6), RFLT, '3'},
63 {"F2", FP_REG(5), RFLT, '3'},
64 {"F3", FP_REG(4), RFLT, '3'},
65 {"F4", FP_REG(3), RFLT, '3'},
66 {"F5", FP_REG(2), RFLT, '3'},
67 {"F6", FP_REG(1), RFLT, '3'},
68 {"F7", FP_REG(0), RFLT, '3'},
75 M386, /* machine type */
76 i386reglist, /* register list */
77 REGSIZE, /* size of registers in bytes */
78 FPREGSIZE, /* size of fp registers in bytes */
79 "PC", /* name of PC */
80 "SP", /* name of SP */
81 "BP", /* name of FP */
82 0, /* link register */
83 "setSB", /* static base register name (bogus anyways) */
84 0, /* static base register value */
85 0x1000, /* page size */
86 0x80100000, /* kernel base */
87 0, /* kernel text mask */
88 1, /* quantization of pc */
94 i386windregs, /* locations unwound in stack trace */
97 {0xCC, 0, 0, 0}, /* break point: INT 3 */
98 1, /* break point size */
100 i386foll, /* following addresses */
101 i386excep, /* print exception */
102 i386unwind, /* stack unwind */
104 leswap2, /* convert short to local byte order */
105 leswap4, /* convert long to local byte order */
106 leswap8, /* convert vlong to local byte order */
107 leieeeftoa32, /* single precision float pointer */
108 leieeeftoa64, /* double precision float pointer */
109 leieeeftoa80, /* long double precision floating point */
111 i386das, /* dissembler */
112 i386das, /* plan9-format disassembler */
113 0, /* commercial disassembler */
114 i386hexinst, /* print instruction */
115 i386instlen, /* instruction size calculation */
118 static char *i386windregs[] = {
132 i386unwind(Map *map, Regs *regs, ulong *next)
138 /* No symbol information, use frame pointer and do the best we can. */
139 isp = windindex("SP");
140 ipc = windindex("PC");
141 ibp = windindex("BP");
142 if(isp < 0 || ipc < 0 || ibp < 0){
143 werrstr("i386unwind: cannot happen");
149 if(get4(map, bp, &v) < 0)
155 if(get4(map, bp+4, &v) < 0)
162 //static char STARTSYM[] = "_main";
163 //static char PROFSYM[] = "_mainp";
164 static char FRAMENAME[] = ".frame";
165 static char *excname[] =
167 "divide error", /* 0 */
168 "debug exception", /* 1 */
171 "bounds check", /* 5 */
172 "invalid opcode", /* 6 */
173 "math coprocessor emulation", /* 7 */
174 "double fault", /* 8 */
175 "math coprocessor overrun", /* 9 */
176 "invalid TSS", /* 10 */
177 "segment not present", /* 11 */
178 "stack exception", /* 12 */
179 "general protection violation", /* 13 */
180 "page fault", /* 14 */
182 "math coprocessor error", /* 16 */
183 0,0,0,0,0,0,0, /* 17-23 */
187 "modem status", /* 27 */
188 "serial line status", /* 28 */
190 "floppy disk", /* 30 */
191 0,0,0,0,0, /* 31-35 */
193 "math coprocessor", /* 37 */
194 "hard disk", /* 38 */
195 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,/* 39-54 */
196 0,0,0,0,0,0,0,0,0, /* 55-63 */
197 "system call", /* 64 */
201 i386excep(Map *map, Regs *regs)
207 if(rget(regs, "TRAP", &c) < 0)
208 return "no trap register";
210 if(c > 64 || excname[c] == 0) {
212 if (rget(regs, "PC", &pc) >= 0)
213 if (get1(map, pc, (uchar*)buf, mach->bpsize) > 0)
214 if (memcmp(buf, mach->bpinst, mach->bpsize) == 0)
217 sprint(buf, "exception %ld", c);
223 /* I386/486 - Disassembler and related functions */
228 typedef struct Instr Instr;
231 uchar mem[1+1+1+1+2+1+1+4+4]; /* raw instruction */
232 ulong addr; /* address of start of instruction */
233 int n; /* number of bytes in instruction */
234 char *prefix; /* instr prefix */
235 char *segment; /* segment override */
236 uchar jumptype; /* set to the operand type for jump/ret/call */
237 char osize; /* 'W' or 'L' */
238 char asize; /* address size 'W' or 'L' */
239 uchar mod; /* bits 6-7 of mod r/m field */
240 uchar reg; /* bits 3-5 of mod r/m field */
241 char ss; /* bits 6-7 of SIB */
242 char index; /* bits 3-5 of SIB */
243 char base; /* bits 0-2 of SIB */
244 short seg; /* segment of far address */
245 ulong disp; /* displacement */
246 ulong imm; /* immediate */
247 ulong imm2; /* second immediate operand */
248 char *curr; /* fill level in output buffer */
249 char *end; /* end of output buffer */
250 char *err; /* error message */
253 /* 386 register (ha!) set */
264 /* Operand Format codes */
266 %A - address size register modifier (!asize -> 'E')
267 %C - Control register CR0/CR1/CR2
268 %D - Debug register DR0/DR1/DR2/DR3/DR6/DR7
269 %I - second immediate operand
270 %O - Operand size register modifier (!osize -> 'E')
271 %T - Test register TR6/TR7
272 %S - size code ('W' or 'L')
273 %X - Weird opcode: OSIZE == 'W' => "CBW"; else => "CWDE"
274 %d - displacement 16-32 bits
275 %e - effective address - Mod R/M value
276 %f - floating point register F0-F7 - from Mod R/M register
277 %g - segment register
278 %i - immediate operand 8-32 bits
279 %p - PC-relative - signed displacement in immediate field
280 %r - Reg from Mod R/M
281 %x - Weird opcode: OSIZE == 'W' => "CWD"; else => "CDQ"
284 typedef struct Optable Optable;
288 void *proto; /* actually either (char*) or (Optable*) */
290 /* Operand decoding codes */
292 Ib = 1, /* 8-bit immediate - (no sign extension)*/
293 Ibs, /* 8-bit immediate (sign extended) */
294 Jbs, /* 8-bit sign-extended immediate in jump or call */
295 Iw, /* 16-bit immediate -> imm */
296 Iw2, /* 16-bit immediate -> imm2 */
297 Iwd, /* Operand-sized immediate (no sign extension)*/
298 Awd, /* Address offset */
299 Iwds, /* Operand-sized immediate (sign extended) */
300 RM, /* Word or long R/M field with register (/r) */
301 RMB, /* Byte R/M field with register (/r) */
302 RMOP, /* Word or long R/M field with op code (/digit) */
303 RMOPB, /* Byte R/M field with op code (/digit) */
304 RMR, /* R/M register only (mod = 11) */
305 RMM, /* R/M memory only (mod = 0/1/2) */
306 R0, /* Base reg of Mod R/M is literal 0x00 */
307 R1, /* Base reg of Mod R/M is literal 0x01 */
308 FRMOP, /* Floating point R/M field with opcode */
309 FRMEX, /* Extended floating point R/M field with opcode */
310 JUMP, /* Jump or Call flag - no operand */
311 RET, /* Return flag - no operand */
312 OA, /* literal 0x0a byte */
313 PTR, /* Seg:Displacement addr (ptr16:16 or ptr16:32) */
314 AUX, /* Multi-byte op code - Auxiliary table */
315 PRE, /* Instr Prefix */
316 SEG, /* Segment Prefix */
317 OPOVER, /* Operand size override */
318 ADDOVER, /* Address size override */
321 static Optable optab0F00[8]=
323 0,0, "MOVW LDT,%e", /* 0x00 */
324 0,0, "MOVW TR,%e", /* 0x01 */
325 0,0, "MOVW %e,LDT", /* 0x02 */
326 0,0, "MOVW %e,TR", /* 0x03 */
327 0,0, "VERR %e", /* 0x04 */
328 0,0, "VERW %e", /* 0x05 */
331 static Optable optab0F01[8]=
333 0,0, "MOVL GDTR,%e", /* 0x00 */
334 0,0, "MOVL IDTR,%e", /* 0x01 */
335 0,0, "MOVL %e,GDTR", /* 0x02 */
336 0,0, "MOVL %e,IDTR", /* 0x03 */
337 0,0, "MOVW MSW,%e", /* 0x04 */ /* word */
339 0,0, "MOVW %e,MSW", /* 0x06 */ /* word */
342 static Optable optab0FBA[8]=
348 Ib,0, "BT%S %i,%e", /* 0x04 */
349 Ib,0, "BTS%S %i,%e", /* 0x05 */
350 Ib,0, "BTR%S %i,%e", /* 0x06 */
351 Ib,0, "BTC%S %i,%e", /* 0x07 */
354 static Optable optab0F[256]=
356 RMOP,0, optab0F00, /* 0x00 */
357 RMOP,0, optab0F01, /* 0x01 */
358 RM,0, "LAR %e,%r", /* 0x02 */
359 RM,0, "LSL %e,%r", /* 0x03 */
362 0,0, "CLTS", /* 0x06 */
364 0,0, "INVD", /* 0x08 */
365 0,0, "WBINVD", /* 0x09 */
388 RMR,0, "MOVL %C,%e", /* 0x20 */
389 RMR,0, "MOVL %D,%e", /* 0x21 */
390 RMR,0, "MOVL %e,%C", /* 0x22 */
391 RMR,0, "MOVL %e,%D", /* 0x23 */
392 RMR,0, "MOVL %T,%e", /* 0x24 */
394 RMR,0, "MOVL %e,%T", /* 0x26 */
404 0,0, "WRMSR", /* 0x30 */
405 0,0, "RDTSC", /* 0x31 */
406 0,0, "RDMSR", /* 0x32 */
484 Iwds,0, "JOS %p", /* 0x80 */
485 Iwds,0, "JOC %p", /* 0x81 */
486 Iwds,0, "JCS %p", /* 0x82 */
487 Iwds,0, "JCC %p", /* 0x83 */
488 Iwds,0, "JEQ %p", /* 0x84 */
489 Iwds,0, "JNE %p", /* 0x85 */
490 Iwds,0, "JLS %p", /* 0x86 */
491 Iwds,0, "JHI %p", /* 0x87 */
492 Iwds,0, "JMI %p", /* 0x88 */
493 Iwds,0, "JPL %p", /* 0x89 */
494 Iwds,0, "JPS %p", /* 0x8a */
495 Iwds,0, "JPC %p", /* 0x8b */
496 Iwds,0, "JLT %p", /* 0x8c */
497 Iwds,0, "JGE %p", /* 0x8d */
498 Iwds,0, "JLE %p", /* 0x8e */
499 Iwds,0, "JGT %p", /* 0x8f */
500 RMB,0, "SETOS %e", /* 0x90 */
501 RMB,0, "SETOC %e", /* 0x91 */
502 RMB,0, "SETCS %e", /* 0x92 */
503 RMB,0, "SETCC %e", /* 0x93 */
504 RMB,0, "SETEQ %e", /* 0x94 */
505 RMB,0, "SETNE %e", /* 0x95 */
506 RMB,0, "SETLS %e", /* 0x96 */
507 RMB,0, "SETHI %e", /* 0x97 */
508 RMB,0, "SETMI %e", /* 0x98 */
509 RMB,0, "SETPL %e", /* 0x99 */
510 RMB,0, "SETPS %e", /* 0x9a */
511 RMB,0, "SETPC %e", /* 0x9b */
512 RMB,0, "SETLT %e", /* 0x9c */
513 RMB,0, "SETGE %e", /* 0x9d */
514 RMB,0, "SETLE %e", /* 0x9e */
515 RMB,0, "SETGT %e", /* 0x9f */
516 0,0, "PUSHL FS", /* 0xa0 */
517 0,0, "POPL FS", /* 0xa1 */
518 0,0, "CPUID", /* 0xa2 */
519 RM,0, "BT%S %r,%e", /* 0xa3 */
520 RM,Ib, "SHLD%S %r,%i,%e", /* 0xa4 */
521 RM,0, "SHLD%S %r,CL,%e", /* 0xa5 */
524 0,0, "PUSHL GS", /* 0xa8 */
525 0,0, "POPL GS", /* 0xa9 */
527 RM,0, "BTS%S %r,%e", /* 0xab */
528 RM,Ib, "SHRD%S %r,%i,%e", /* 0xac */
529 RM,0, "SHRD%S %r,CL,%e", /* 0xad */
531 RM,0, "IMUL%S %e,%r", /* 0xaf */
534 RMM,0, "LSS %e,%r", /* 0xb2 */
535 RM,0, "BTR%S %r,%e", /* 0xb3 */
536 RMM,0, "LFS %e,%r", /* 0xb4 */
537 RMM,0, "LGS %e,%r", /* 0xb5 */
538 RMB,0, "MOVBZX %e,%R", /* 0xb6 */
539 RM,0, "MOVWZX %e,%R", /* 0xb7 */
542 RMOP,0, optab0FBA, /* 0xba */
543 RM,0, "BTC%S %e,%r", /* 0xbb */
544 RM,0, "BSF%S %e,%r", /* 0xbc */
545 RM,0, "BSR%S %e,%r", /* 0xbd */
546 RMB,0, "MOVBSX %e,%R", /* 0xbe */
547 RM,0, "MOVWSX %e,%R", /* 0xbf */
550 static Optable optab80[8]=
552 Ib,0, "ADDB %i,%e", /* 0x00 */
553 Ib,0, "ORB %i,%e", /* 0x01 */
554 Ib,0, "ADCB %i,%e", /* 0x02 */
555 Ib,0, "SBBB %i,%e", /* 0x03 */
556 Ib,0, "ANDB %i,%e", /* 0x04 */
557 Ib,0, "SUBB %i,%e", /* 0x05 */
558 Ib,0, "XORB %i,%e", /* 0x06 */
559 Ib,0, "CMPB %e,%i", /* 0x07 */
562 static Optable optab81[8]=
564 Iwd,0, "ADD%S %i,%e", /* 0x00 */
565 Iwd,0, "OR%S %i,%e", /* 0x01 */
566 Iwd,0, "ADC%S %i,%e", /* 0x02 */
567 Iwd,0, "SBB%S %i,%e", /* 0x03 */
568 Iwd,0, "AND%S %i,%e", /* 0x04 */
569 Iwd,0, "SUB%S %i,%e", /* 0x05 */
570 Iwd,0, "XOR%S %i,%e", /* 0x06 */
571 Iwd,0, "CMP%S %e,%i", /* 0x07 */
574 static Optable optab83[8]=
576 Ibs,0, "ADD%S %i,%e", /* 0x00 */
577 Ibs,0, "OR%S %i,%e", /* 0x01 */
578 Ibs,0, "ADC%S %i,%e", /* 0x02 */
579 Ibs,0, "SBB%S %i,%e", /* 0x03 */
580 Ibs,0, "AND%S %i,%e", /* 0x04 */
581 Ibs,0, "SUB%S %i,%e", /* 0x05 */
582 Ibs,0, "XOR%S %i,%e", /* 0x06 */
583 Ibs,0, "CMP%S %e,%i", /* 0x07 */
586 static Optable optabC0[8] =
588 Ib,0, "ROLB %i,%e", /* 0x00 */
589 Ib,0, "RORB %i,%e", /* 0x01 */
590 Ib,0, "RCLB %i,%e", /* 0x02 */
591 Ib,0, "RCRB %i,%e", /* 0x03 */
592 Ib,0, "SHLB %i,%e", /* 0x04 */
593 Ib,0, "SHRB %i,%e", /* 0x05 */
595 Ib,0, "SARB %i,%e", /* 0x07 */
598 static Optable optabC1[8] =
600 Ib,0, "ROL%S %i,%e", /* 0x00 */
601 Ib,0, "ROR%S %i,%e", /* 0x01 */
602 Ib,0, "RCL%S %i,%e", /* 0x02 */
603 Ib,0, "RCR%S %i,%e", /* 0x03 */
604 Ib,0, "SHL%S %i,%e", /* 0x04 */
605 Ib,0, "SHR%S %i,%e", /* 0x05 */
607 Ib,0, "SAR%S %i,%e", /* 0x07 */
610 static Optable optabD0[8] =
612 0,0, "ROLB %e", /* 0x00 */
613 0,0, "RORB %e", /* 0x01 */
614 0,0, "RCLB %e", /* 0x02 */
615 0,0, "RCRB %e", /* 0x03 */
616 0,0, "SHLB %e", /* 0x04 */
617 0,0, "SHRB %e", /* 0x05 */
619 0,0, "SARB %e", /* 0x07 */
622 static Optable optabD1[8] =
624 0,0, "ROL%S %e", /* 0x00 */
625 0,0, "ROR%S %e", /* 0x01 */
626 0,0, "RCL%S %e", /* 0x02 */
627 0,0, "RCR%S %e", /* 0x03 */
628 0,0, "SHL%S %e", /* 0x04 */
629 0,0, "SHR%S %e", /* 0x05 */
631 0,0, "SAR%S %e", /* 0x07 */
634 static Optable optabD2[8] =
636 0,0, "ROLB CL,%e", /* 0x00 */
637 0,0, "RORB CL,%e", /* 0x01 */
638 0,0, "RCLB CL,%e", /* 0x02 */
639 0,0, "RCRB CL,%e", /* 0x03 */
640 0,0, "SHLB CL,%e", /* 0x04 */
641 0,0, "SHRB CL,%e", /* 0x05 */
643 0,0, "SARB CL,%e", /* 0x07 */
646 static Optable optabD3[8] =
648 0,0, "ROL%S CL,%e", /* 0x00 */
649 0,0, "ROR%S CL,%e", /* 0x01 */
650 0,0, "RCL%S CL,%e", /* 0x02 */
651 0,0, "RCR%S CL,%e", /* 0x03 */
652 0,0, "SHL%S CL,%e", /* 0x04 */
653 0,0, "SHR%S CL,%e", /* 0x05 */
655 0,0, "SAR%S CL,%e", /* 0x07 */
658 static Optable optabD8[8+8] =
660 0,0, "FADDF %e,F0", /* 0x00 */
661 0,0, "FMULF %e,F0", /* 0x01 */
662 0,0, "FCOMF %e,F0", /* 0x02 */
663 0,0, "FCOMFP %e,F0", /* 0x03 */
664 0,0, "FSUBF %e,F0", /* 0x04 */
665 0,0, "FSUBRF %e,F0", /* 0x05 */
666 0,0, "FDIVF %e,F0", /* 0x06 */
667 0,0, "FDIVRF %e,F0", /* 0x07 */
668 0,0, "FADDD %f,F0", /* 0x08 */
669 0,0, "FMULD %f,F0", /* 0x09 */
670 0,0, "FCOMD %f,F0", /* 0x0a */
671 0,0, "FCOMPD %f,F0", /* 0x0b */
672 0,0, "FSUBD %f,F0", /* 0x0c */
673 0,0, "FSUBRD %f,F0", /* 0x0d */
674 0,0, "FDIVD %f,F0", /* 0x0e */
675 0,0, "FDIVRD %f,F0", /* 0x0f */
678 * optabD9 and optabDB use the following encoding:
679 * if (0 <= modrm <= 2) instruction = optabDx[modrm&0x07];
680 * else instruction = optabDx[(modrm&0x3f)+8];
682 * the instructions for MOD == 3, follow the 8 instructions
683 * for the other MOD values stored at the front of the table.
685 static Optable optabD9[64+8] =
687 0,0, "FMOVF %e,F0", /* 0x00 */
689 0,0, "FMOVF F0,%e", /* 0x02 */
690 0,0, "FMOVFP F0,%e", /* 0x03 */
691 0,0, "FLDENV%S %e", /* 0x04 */
692 0,0, "FLDCW %e", /* 0x05 */
693 0,0, "FSTENV%S %e", /* 0x06 */
694 0,0, "FSTCW %e", /* 0x07 */
695 0,0, "FMOVD F0,F0", /* 0x08 */ /* Mod R/M = 11xx xxxx*/
696 0,0, "FMOVD F1,F0", /* 0x09 */
697 0,0, "FMOVD F2,F0", /* 0x0a */
698 0,0, "FMOVD F3,F0", /* 0x0b */
699 0,0, "FMOVD F4,F0", /* 0x0c */
700 0,0, "FMOVD F5,F0", /* 0x0d */
701 0,0, "FMOVD F6,F0", /* 0x0e */
702 0,0, "FMOVD F7,F0", /* 0x0f */
703 0,0, "FXCHD F0,F0", /* 0x10 */
704 0,0, "FXCHD F1,F0", /* 0x11 */
705 0,0, "FXCHD F2,F0", /* 0x12 */
706 0,0, "FXCHD F3,F0", /* 0x13 */
707 0,0, "FXCHD F4,F0", /* 0x14 */
708 0,0, "FXCHD F5,F0", /* 0x15 */
709 0,0, "FXCHD F6,F0", /* 0x16 */
710 0,0, "FXCHD F7,F0", /* 0x17 */
711 0,0, "FNOP", /* 0x18 */
727 0,0, "FCHS", /* 0x28 */
728 0,0, "FABS", /* 0x29 */
731 0,0, "FTST", /* 0x2c */
732 0,0, "FXAM", /* 0x2d */
735 0,0, "FLD1", /* 0x30 */
736 0,0, "FLDL2T", /* 0x31 */
737 0,0, "FLDL2E", /* 0x32 */
738 0,0, "FLDPI", /* 0x33 */
739 0,0, "FLDLG2", /* 0x34 */
740 0,0, "FLDLN2", /* 0x35 */
741 0,0, "FLDZ", /* 0x36 */
743 0,0, "F2XM1", /* 0x38 */
744 0,0, "FYL2X", /* 0x39 */
745 0,0, "FPTAN", /* 0x3a */
746 0,0, "FPATAN", /* 0x3b */
747 0,0, "FXTRACT", /* 0x3c */
748 0,0, "FPREM1", /* 0x3d */
749 0,0, "FDECSTP", /* 0x3e */
750 0,0, "FNCSTP", /* 0x3f */
751 0,0, "FPREM", /* 0x40 */
752 0,0, "FYL2XP1", /* 0x41 */
753 0,0, "FSQRT", /* 0x42 */
754 0,0, "FSINCOS", /* 0x43 */
755 0,0, "FRNDINT", /* 0x44 */
756 0,0, "FSCALE", /* 0x45 */
757 0,0, "FSIN", /* 0x46 */
758 0,0, "FCOS", /* 0x47 */
761 static Optable optabDA[8+8] =
763 0,0, "FADDL %e,F0", /* 0x00 */
764 0,0, "FMULL %e,F0", /* 0x01 */
765 0,0, "FCOML %e,F0", /* 0x02 */
766 0,0, "FCOMLP %e,F0", /* 0x03 */
767 0,0, "FSUBL %e,F0", /* 0x04 */
768 0,0, "FSUBRL %e,F0", /* 0x05 */
769 0,0, "FDIVL %e,F0", /* 0x06 */
770 0,0, "FDIVRL %e,F0", /* 0x07 */
776 R1,0, "FUCOMPP", /* 0x0d */
779 static Optable optabDB[8+64] =
781 0,0, "FMOVL %e,F0", /* 0x00 */
783 0,0, "FMOVL F0,%e", /* 0x02 */
784 0,0, "FMOVLP F0,%e", /* 0x03 */
786 0,0, "FMOVX %e,F0", /* 0x05 */
788 0,0, "FMOVXP F0,%e", /* 0x07 */
823 0,0, "FCLEX", /* 0x2a */
824 0,0, "FINIT", /* 0x2b */
827 static Optable optabDC[8+8] =
829 0,0, "FADDD %e,F0", /* 0x00 */
830 0,0, "FMULD %e,F0", /* 0x01 */
831 0,0, "FCOMD %e,F0", /* 0x02 */
832 0,0, "FCOMDP %e,F0", /* 0x03 */
833 0,0, "FSUBD %e,F0", /* 0x04 */
834 0,0, "FSUBRD %e,F0", /* 0x05 */
835 0,0, "FDIVD %e,F0", /* 0x06 */
836 0,0, "FDIVRD %e,F0", /* 0x07 */
837 0,0, "FADDD F0,%f", /* 0x08 */
838 0,0, "FMULD F0,%f", /* 0x09 */
841 0,0, "FSUBRD F0,%f", /* 0x0c */
842 0,0, "FSUBD F0,%f", /* 0x0d */
843 0,0, "FDIVRD F0,%f", /* 0x0e */
844 0,0, "FDIVD F0,%f", /* 0x0f */
847 static Optable optabDD[8+8] =
849 0,0, "FMOVD %e,F0", /* 0x00 */
851 0,0, "FMOVD F0,%e", /* 0x02 */
852 0,0, "FMOVDP F0,%e", /* 0x03 */
853 0,0, "FRSTOR%S %e", /* 0x04 */
855 0,0, "FSAVE%S %e", /* 0x06 */
856 0,0, "FSTSW %e", /* 0x07 */
857 0,0, "FFREED %f", /* 0x08 */
859 0,0, "FMOVD %f,F0", /* 0x0a */
860 0,0, "FMOVDP %f,F0", /* 0x0b */
861 0,0, "FUCOMD %f,F0", /* 0x0c */
862 0,0, "FUCOMDP %f,F0", /* 0x0d */
865 static Optable optabDE[8+8] =
867 0,0, "FADDW %e,F0", /* 0x00 */
868 0,0, "FMULW %e,F0", /* 0x01 */
869 0,0, "FCOMW %e,F0", /* 0x02 */
870 0,0, "FCOMWP %e,F0", /* 0x03 */
871 0,0, "FSUBW %e,F0", /* 0x04 */
872 0,0, "FSUBRW %e,F0", /* 0x05 */
873 0,0, "FDIVW %e,F0", /* 0x06 */
874 0,0, "FDIVRW %e,F0", /* 0x07 */
875 0,0, "FADDDP F0,%f", /* 0x08 */
876 0,0, "FMULDP F0,%f", /* 0x09 */
878 R1,0, "FCOMPDP", /* 0x0b */
879 0,0, "FSUBRDP F0,%f", /* 0x0c */
880 0,0, "FSUBDP F0,%f", /* 0x0d */
881 0,0, "FDIVRDP F0,%f", /* 0x0e */
882 0,0, "FDIVDP F0,%f", /* 0x0f */
885 static Optable optabDF[8+8] =
887 0,0, "FMOVW %e,F0", /* 0x00 */
889 0,0, "FMOVW F0,%e", /* 0x02 */
890 0,0, "FMOVWP F0,%e", /* 0x03 */
891 0,0, "FBLD %e", /* 0x04 */
892 0,0, "FMOVL %e,F0", /* 0x05 */
893 0,0, "FBSTP %e", /* 0x06 */
894 0,0, "FMOVLP F0,%e", /* 0x07 */
899 R0,0, "FSTSW %OAX", /* 0x0c */
902 static Optable optabF6[8] =
904 Ib,0, "TESTB %i,%e", /* 0x00 */
906 0,0, "NOTB %e", /* 0x02 */
907 0,0, "NEGB %e", /* 0x03 */
908 0,0, "MULB AL,%e", /* 0x04 */
909 0,0, "IMULB AL,%e", /* 0x05 */
910 0,0, "DIVB AL,%e", /* 0x06 */
911 0,0, "IDIVB AL,%e", /* 0x07 */
914 static Optable optabF7[8] =
916 Iwd,0, "TEST%S %i,%e", /* 0x00 */
918 0,0, "NOT%S %e", /* 0x02 */
919 0,0, "NEG%S %e", /* 0x03 */
920 0,0, "MUL%S %OAX,%e", /* 0x04 */
921 0,0, "IMUL%S %OAX,%e", /* 0x05 */
922 0,0, "DIV%S %OAX,%e", /* 0x06 */
923 0,0, "IDIV%S %OAX,%e", /* 0x07 */
926 static Optable optabFE[8] =
928 0,0, "INCB %e", /* 0x00 */
929 0,0, "DECB %e", /* 0x01 */
932 static Optable optabFF[8] =
934 0,0, "INC%S %e", /* 0x00 */
935 0,0, "DEC%S %e", /* 0x01 */
936 JUMP,0, "CALL*%S %e", /* 0x02 */
937 JUMP,0, "CALLF*%S %e", /* 0x03 */
938 JUMP,0, "JMP*%S %e", /* 0x04 */
939 JUMP,0, "JMPF*%S %e", /* 0x05 */
940 0,0, "PUSHL %e", /* 0x06 */
943 static Optable optable[256] =
945 RMB,0, "ADDB %r,%e", /* 0x00 */
946 RM,0, "ADD%S %r,%e", /* 0x01 */
947 RMB,0, "ADDB %e,%r", /* 0x02 */
948 RM,0, "ADD%S %e,%r", /* 0x03 */
949 Ib,0, "ADDB %i,AL", /* 0x04 */
950 Iwd,0, "ADD%S %i,%OAX", /* 0x05 */
951 0,0, "PUSHL ES", /* 0x06 */
952 0,0, "POPL ES", /* 0x07 */
953 RMB,0, "ORB %r,%e", /* 0x08 */
954 RM,0, "OR%S %r,%e", /* 0x09 */
955 RMB,0, "ORB %e,%r", /* 0x0a */
956 RM,0, "OR%S %e,%r", /* 0x0b */
957 Ib,0, "ORB %i,AL", /* 0x0c */
958 Iwd,0, "OR%S %i,%OAX", /* 0x0d */
959 0,0, "PUSHL CS", /* 0x0e */
960 AUX,0, optab0F, /* 0x0f */
961 RMB,0, "ADCB %r,%e", /* 0x10 */
962 RM,0, "ADC%S %r,%e", /* 0x11 */
963 RMB,0, "ADCB %e,%r", /* 0x12 */
964 RM,0, "ADC%S %e,%r", /* 0x13 */
965 Ib,0, "ADCB %i,AL", /* 0x14 */
966 Iwd,0, "ADC%S %i,%OAX", /* 0x15 */
967 0,0, "PUSHL SS", /* 0x16 */
968 0,0, "POPL SS", /* 0x17 */
969 RMB,0, "SBBB %r,%e", /* 0x18 */
970 RM,0, "SBB%S %r,%e", /* 0x19 */
971 RMB,0, "SBBB %e,%r", /* 0x1a */
972 RM,0, "SBB%S %e,%r", /* 0x1b */
973 Ib,0, "SBBB %i,AL", /* 0x1c */
974 Iwd,0, "SBB%S %i,%OAX", /* 0x1d */
975 0,0, "PUSHL DS", /* 0x1e */
976 0,0, "POPL DS", /* 0x1f */
977 RMB,0, "ANDB %r,%e", /* 0x20 */
978 RM,0, "AND%S %r,%e", /* 0x21 */
979 RMB,0, "ANDB %e,%r", /* 0x22 */
980 RM,0, "AND%S %e,%r", /* 0x23 */
981 Ib,0, "ANDB %i,AL", /* 0x24 */
982 Iwd,0, "AND%S %i,%OAX", /* 0x25 */
983 SEG,0, "ES:", /* 0x26 */
984 0,0, "DAA", /* 0x27 */
985 RMB,0, "SUBB %r,%e", /* 0x28 */
986 RM,0, "SUB%S %r,%e", /* 0x29 */
987 RMB,0, "SUBB %e,%r", /* 0x2a */
988 RM,0, "SUB%S %e,%r", /* 0x2b */
989 Ib,0, "SUBB %i,AL", /* 0x2c */
990 Iwd,0, "SUB%S %i,%OAX", /* 0x2d */
991 SEG,0, "CS:", /* 0x2e */
992 0,0, "DAS", /* 0x2f */
993 RMB,0, "XORB %r,%e", /* 0x30 */
994 RM,0, "XOR%S %r,%e", /* 0x31 */
995 RMB,0, "XORB %e,%r", /* 0x32 */
996 RM,0, "XOR%S %e,%r", /* 0x33 */
997 Ib,0, "XORB %i,AL", /* 0x34 */
998 Iwd,0, "XOR%S %i,%OAX", /* 0x35 */
999 SEG,0, "SS:", /* 0x36 */
1000 0,0, "AAA", /* 0x37 */
1001 RMB,0, "CMPB %r,%e", /* 0x38 */
1002 RM,0, "CMP%S %r,%e", /* 0x39 */
1003 RMB,0, "CMPB %e,%r", /* 0x3a */
1004 RM,0, "CMP%S %e,%r", /* 0x3b */
1005 Ib,0, "CMPB %i,AL", /* 0x3c */
1006 Iwd,0, "CMP%S %i,%OAX", /* 0x3d */
1007 SEG,0, "DS:", /* 0x3e */
1008 0,0, "AAS", /* 0x3f */
1009 0,0, "INC%S %OAX", /* 0x40 */
1010 0,0, "INC%S %OCX", /* 0x41 */
1011 0,0, "INC%S %ODX", /* 0x42 */
1012 0,0, "INC%S %OBX", /* 0x43 */
1013 0,0, "INC%S %OSP", /* 0x44 */
1014 0,0, "INC%S %OBP", /* 0x45 */
1015 0,0, "INC%S %OSI", /* 0x46 */
1016 0,0, "INC%S %ODI", /* 0x47 */
1017 0,0, "DEC%S %OAX", /* 0x48 */
1018 0,0, "DEC%S %OCX", /* 0x49 */
1019 0,0, "DEC%S %ODX", /* 0x4a */
1020 0,0, "DEC%S %OBX", /* 0x4b */
1021 0,0, "DEC%S %OSP", /* 0x4c */
1022 0,0, "DEC%S %OBP", /* 0x4d */
1023 0,0, "DEC%S %OSI", /* 0x4e */
1024 0,0, "DEC%S %ODI", /* 0x4f */
1025 0,0, "PUSH%S %OAX", /* 0x50 */
1026 0,0, "PUSH%S %OCX", /* 0x51 */
1027 0,0, "PUSH%S %ODX", /* 0x52 */
1028 0,0, "PUSH%S %OBX", /* 0x53 */
1029 0,0, "PUSH%S %OSP", /* 0x54 */
1030 0,0, "PUSH%S %OBP", /* 0x55 */
1031 0,0, "PUSH%S %OSI", /* 0x56 */
1032 0,0, "PUSH%S %ODI", /* 0x57 */
1033 0,0, "POP%S %OAX", /* 0x58 */
1034 0,0, "POP%S %OCX", /* 0x59 */
1035 0,0, "POP%S %ODX", /* 0x5a */
1036 0,0, "POP%S %OBX", /* 0x5b */
1037 0,0, "POP%S %OSP", /* 0x5c */
1038 0,0, "POP%S %OBP", /* 0x5d */
1039 0,0, "POP%S %OSI", /* 0x5e */
1040 0,0, "POP%S %ODI", /* 0x5f */
1041 0,0, "PUSHA%S", /* 0x60 */
1042 0,0, "POPA%S", /* 0x61 */
1043 RMM,0, "BOUND %e,%r", /* 0x62 */
1044 RM,0, "ARPL %r,%e", /* 0x63 */
1045 SEG,0, "FS:", /* 0x64 */
1046 SEG,0, "GS:", /* 0x65 */
1047 OPOVER,0, "", /* 0x66 */
1048 ADDOVER,0, "", /* 0x67 */
1049 Iwd,0, "PUSH%S %i", /* 0x68 */
1050 RM,Iwd, "IMUL%S %e,%i,%r", /* 0x69 */
1051 Ib,0, "PUSH%S %i", /* 0x6a */
1052 RM,Ibs, "IMUL%S %e,%i,%r", /* 0x6b */
1053 0,0, "INSB DX,(%ODI)", /* 0x6c */
1054 0,0, "INS%S DX,(%ODI)", /* 0x6d */
1055 0,0, "OUTSB (%ASI),DX", /* 0x6e */
1056 0,0, "OUTS%S (%ASI),DX", /* 0x6f */
1057 Jbs,0, "JOS %p", /* 0x70 */
1058 Jbs,0, "JOC %p", /* 0x71 */
1059 Jbs,0, "JCS %p", /* 0x72 */
1060 Jbs,0, "JCC %p", /* 0x73 */
1061 Jbs,0, "JEQ %p", /* 0x74 */
1062 Jbs,0, "JNE %p", /* 0x75 */
1063 Jbs,0, "JLS %p", /* 0x76 */
1064 Jbs,0, "JHI %p", /* 0x77 */
1065 Jbs,0, "JMI %p", /* 0x78 */
1066 Jbs,0, "JPL %p", /* 0x79 */
1067 Jbs,0, "JPS %p", /* 0x7a */
1068 Jbs,0, "JPC %p", /* 0x7b */
1069 Jbs,0, "JLT %p", /* 0x7c */
1070 Jbs,0, "JGE %p", /* 0x7d */
1071 Jbs,0, "JLE %p", /* 0x7e */
1072 Jbs,0, "JGT %p", /* 0x7f */
1073 RMOPB,0, optab80, /* 0x80 */
1074 RMOP,0, optab81, /* 0x81 */
1076 RMOP,0, optab83, /* 0x83 */
1077 RMB,0, "TESTB %r,%e", /* 0x84 */
1078 RM,0, "TEST%S %r,%e", /* 0x85 */
1079 RMB,0, "XCHGB %r,%e", /* 0x86 */
1080 RM,0, "XCHG%S %r,%e", /* 0x87 */
1081 RMB,0, "MOVB %r,%e", /* 0x88 */
1082 RM,0, "MOV%S %r,%e", /* 0x89 */
1083 RMB,0, "MOVB %e,%r", /* 0x8a */
1084 RM,0, "MOV%S %e,%r", /* 0x8b */
1085 RM,0, "MOVW %g,%e", /* 0x8c */
1086 RM,0, "LEA %e,%r", /* 0x8d */
1087 RM,0, "MOVW %e,%g", /* 0x8e */
1088 RM,0, "POP%S %e", /* 0x8f */
1089 0,0, "NOP", /* 0x90 */
1090 0,0, "XCHG %OCX,%OAX", /* 0x91 */
1091 0,0, "XCHG %OCX,%OAX", /* 0x92 */
1092 0,0, "XCHG %OCX,%OAX", /* 0x93 */
1093 0,0, "XCHG %OSP,%OAX", /* 0x94 */
1094 0,0, "XCHG %OBP,%OAX", /* 0x95 */
1095 0,0, "XCHG %OSI,%OAX", /* 0x96 */
1096 0,0, "XCHG %ODI,%OAX", /* 0x97 */
1097 0,0, "%X", /* 0x98 */ /* miserable CBW or CWDE */
1098 0,0, "%x", /* 0x99 */ /* idiotic CWD or CDQ */
1099 PTR,0, "CALL%S %d", /* 0x9a */
1100 0,0, "WAIT", /* 0x9b */
1101 0,0, "PUSHF", /* 0x9c */
1102 0,0, "POPF", /* 0x9d */
1103 0,0, "SAHF", /* 0x9e */
1104 0,0, "LAHF", /* 0x9f */
1105 Awd,0, "MOVB %i,AL", /* 0xa0 */
1106 Awd,0, "MOV%S %i,%OAX", /* 0xa1 */
1107 Awd,0, "MOVB AL,%i", /* 0xa2 */
1108 Awd,0, "MOV%S %OAX,%i", /* 0xa3 */
1109 0,0, "MOVSB (%ASI),(%ADI)", /* 0xa4 */
1110 0,0, "MOVS%S (%ASI),(%ADI)", /* 0xa5 */
1111 0,0, "CMPSB (%ASI),(%ADI)", /* 0xa6 */
1112 0,0, "CMPS%S (%ASI),(%ADI)", /* 0xa7 */
1113 Ib,0, "TESTB %i,AL", /* 0xa8 */
1114 Iwd,0, "TEST%S %i,%OAX", /* 0xa9 */
1115 0,0, "STOSB AL,(%ADI)", /* 0xaa */
1116 0,0, "STOS%S %OAX,(%ADI)", /* 0xab */
1117 0,0, "LODSB (%ASI),AL", /* 0xac */
1118 0,0, "LODS%S (%ASI),%OAX", /* 0xad */
1119 0,0, "SCASB (%ADI),AL", /* 0xae */
1120 0,0, "SCAS%S (%ADI),%OAX", /* 0xaf */
1121 Ib,0, "MOVB %i,AL", /* 0xb0 */
1122 Ib,0, "MOVB %i,CL", /* 0xb1 */
1123 Ib,0, "MOVB %i,DL", /* 0xb2 */
1124 Ib,0, "MOVB %i,BL", /* 0xb3 */
1125 Ib,0, "MOVB %i,AH", /* 0xb4 */
1126 Ib,0, "MOVB %i,CH", /* 0xb5 */
1127 Ib,0, "MOVB %i,DH", /* 0xb6 */
1128 Ib,0, "MOVB %i,BH", /* 0xb7 */
1129 Iwd,0, "MOV%S %i,%OAX", /* 0xb8 */
1130 Iwd,0, "MOV%S %i,%OCX", /* 0xb9 */
1131 Iwd,0, "MOV%S %i,%ODX", /* 0xba */
1132 Iwd,0, "MOV%S %i,%OBX", /* 0xbb */
1133 Iwd,0, "MOV%S %i,%OSP", /* 0xbc */
1134 Iwd,0, "MOV%S %i,%OBP", /* 0xbd */
1135 Iwd,0, "MOV%S %i,%OSI", /* 0xbe */
1136 Iwd,0, "MOV%S %i,%ODI", /* 0xbf */
1137 RMOPB,0, optabC0, /* 0xc0 */
1138 RMOP,0, optabC1, /* 0xc1 */
1139 Iw,0, "RET %i", /* 0xc2 */
1140 RET,0, "RET", /* 0xc3 */
1141 RM,0, "LES %e,%r", /* 0xc4 */
1142 RM,0, "LDS %e,%r", /* 0xc5 */
1143 RMB,Ib, "MOVB %i,%e", /* 0xc6 */
1144 RM,Iwd, "MOV%S %i,%e", /* 0xc7 */
1145 Iw2,Ib, "ENTER %i,%I", /* 0xc8 */ /* loony ENTER */
1146 RET,0, "LEAVE", /* 0xc9 */ /* bizarre LEAVE */
1147 Iw,0, "RETF %i", /* 0xca */
1148 RET,0, "RETF", /* 0xcb */
1149 0,0, "INT 3", /* 0xcc */
1150 Ib,0, "INTB %i", /* 0xcd */
1151 0,0, "INTO", /* 0xce */
1152 0,0, "IRET", /* 0xcf */
1153 RMOPB,0, optabD0, /* 0xd0 */
1154 RMOP,0, optabD1, /* 0xd1 */
1155 RMOPB,0, optabD2, /* 0xd2 */
1156 RMOP,0, optabD3, /* 0xd3 */
1157 OA,0, "AAM", /* 0xd4 */
1158 OA,0, "AAD", /* 0xd5 */
1160 0,0, "XLAT", /* 0xd7 */
1161 FRMOP,0, optabD8, /* 0xd8 */
1162 FRMEX,0, optabD9, /* 0xd9 */
1163 FRMOP,0, optabDA, /* 0xda */
1164 FRMEX,0, optabDB, /* 0xdb */
1165 FRMOP,0, optabDC, /* 0xdc */
1166 FRMOP,0, optabDD, /* 0xdd */
1167 FRMOP,0, optabDE, /* 0xde */
1168 FRMOP,0, optabDF, /* 0xdf */
1169 Jbs,0, "LOOPNE %p", /* 0xe0 */
1170 Jbs,0, "LOOPE %p", /* 0xe1 */
1171 Jbs,0, "LOOP %p", /* 0xe2 */
1172 Jbs,0, "JCXZ %p", /* 0xe3 */
1173 Ib,0, "INB %i,AL", /* 0xe4 */
1174 Ib,0, "IN%S %i,%OAX", /* 0xe5 */
1175 Ib,0, "OUTB AL,%i", /* 0xe6 */
1176 Ib,0, "OUT%S %OAX,%i", /* 0xe7 */
1177 Iwds,0, "CALL %p", /* 0xe8 */
1178 Iwds,0, "JMP %p", /* 0xe9 */
1179 PTR,0, "JMP %d", /* 0xea */
1180 Jbs,0, "JMP %p", /* 0xeb */
1181 0,0, "INB DX,AL", /* 0xec */
1182 0,0, "IN%S DX,%OAX", /* 0xed */
1183 0,0, "OUTB AL,DX", /* 0xee */
1184 0,0, "OUT%S %OAX,DX", /* 0xef */
1185 PRE,0, "LOCK", /* 0xf0 */
1187 PRE,0, "REPNE", /* 0xf2 */
1188 PRE,0, "REP", /* 0xf3 */
1189 0,0, "HALT", /* 0xf4 */
1190 0,0, "CMC", /* 0xf5 */
1191 RMOPB,0, optabF6, /* 0xf6 */
1192 RMOP,0, optabF7, /* 0xf7 */
1193 0,0, "CLC", /* 0xf8 */
1194 0,0, "STC", /* 0xf9 */
1195 0,0, "CLI", /* 0xfa */
1196 0,0, "STI", /* 0xfb */
1197 0,0, "CLD", /* 0xfc */
1198 0,0, "STD", /* 0xfd */
1199 RMOPB,0, optabFE, /* 0xfe */
1200 RMOP,0, optabFF, /* 0xff */
1204 * get a byte of the instruction
1207 igetc(Map * map, Instr *ip, uchar *c)
1209 if(ip->n+1 > sizeof(ip->mem)){
1210 werrstr("instruction too long");
1213 if (get1(map, ip->addr+ip->n, c, 1) < 0) {
1214 werrstr("can't read instruction: %r");
1217 ip->mem[ip->n++] = *c;
1222 * get two bytes of the instruction
1225 igets(Map *map, Instr *ip, ushort *sp)
1230 if (igetc(map, ip, &c) < 0)
1233 if (igetc(map, ip, &c) < 0)
1241 * get 4 bytes of the instruction
1244 igetl(Map *map, Instr *ip, ulong *lp)
1249 if (igets(map, ip, &s) < 0)
1252 if (igets(map, ip, &s) < 0)
1260 getdisp(Map *map, Instr *ip, int mod, int rm, int code)
1268 if (igetc(map, ip, &c) < 0)
1271 ip->disp = c|0xffffff00;
1274 } else if (mod == 2 || rm == code) {
1275 if (ip->asize == 'E') {
1276 if (igetl(map, ip, &ip->disp) < 0)
1279 if (igets(map, ip, &s) < 0)
1282 ip->disp = s|0xffff0000;
1293 modrm(Map *map, Instr *ip, uchar c)
1302 if (mod == 3) /* register */
1304 if (ip->asize == 0) { /* 16-bit mode */
1308 ip->base = BX; ip->index = SI;
1311 ip->base = BX; ip->index = DI;
1314 ip->base = BP; ip->index = SI;
1317 ip->base = BP; ip->index = DI;
1334 return getdisp(map, ip, mod, rm, 6);
1336 if (rm == 4) { /* scummy sib byte */
1337 if (igetc(map, ip, &c) < 0)
1339 ip->ss = (c>>6)&0x03;
1340 ip->index = (c>>3)&0x07;
1344 return getdisp(map, ip, mod, ip->base, 5);
1346 return getdisp(map, ip, mod, rm, 5);
1350 mkinstr(Map *map, Instr *ip, ulong pc)
1355 Optable *op, *obase;
1358 memset(ip, 0, sizeof(*ip));
1361 if(0) /* asstype == AI8086) */
1368 if (igetc(map, ip, &c) < 0)
1373 if (op->proto == 0) {
1375 n = snprint(buf, sizeof(buf), "opcode: ??");
1376 for (i = 0; i < ip->n && n < sizeof(buf)-3; i++, n+=2)
1377 _hexify(buf+n, ip->mem[i], 1);
1378 strcpy(buf+n, "??");
1382 for(i = 0; i < 2 && op->operand[i]; i++) {
1383 switch(op->operand[i])
1385 case Ib: /* 8-bit immediate - (no sign extension)*/
1386 if (igetc(map, ip, &c) < 0)
1390 case Jbs: /* 8-bit jump immediate (sign extended) */
1391 if (igetc(map, ip, &c) < 0)
1394 ip->imm = c|0xffffff00;
1399 case Ibs: /* 8-bit immediate (sign extended) */
1400 if (igetc(map, ip, &c) < 0)
1403 if (ip->osize == 'L')
1404 ip->imm = c|0xffffff00;
1410 case Iw: /* 16-bit immediate -> imm */
1411 if (igets(map, ip, &s) < 0)
1416 case Iw2: /* 16-bit immediate -> in imm2*/
1417 if (igets(map, ip, &s) < 0)
1419 ip->imm2 = s&0xffff;
1421 case Iwd: /* Operand-sized immediate (no sign extension)*/
1422 if (ip->osize == 'L') {
1423 if (igetl(map, ip, &ip->imm) < 0)
1426 if (igets(map, ip, &s)< 0)
1431 case Awd: /* Address-sized immediate (no sign extension)*/
1432 if (ip->asize == 'E') {
1433 if (igetl(map, ip, &ip->imm) < 0)
1436 if (igets(map, ip, &s)< 0)
1441 case Iwds: /* Operand-sized immediate (sign extended) */
1442 if (ip->osize == 'L') {
1443 if (igetl(map, ip, &ip->imm) < 0)
1446 if (igets(map, ip, &s)< 0)
1449 ip->imm = s|0xffff0000;
1453 ip->jumptype = Iwds;
1455 case OA: /* literal 0x0a byte */
1456 if (igetc(map, ip, &c) < 0)
1461 case R0: /* base register must be R0 */
1465 case R1: /* base register must be R1 */
1469 case RMB: /* R/M field with byte register (/r)*/
1470 if (igetc(map, ip, &c) < 0)
1472 if (modrm(map, ip, c) < 0)
1476 case RM: /* R/M field with register (/r) */
1477 if (igetc(map, ip, &c) < 0)
1479 if (modrm(map, ip, c) < 0)
1482 case RMOPB: /* R/M field with op code (/digit) */
1483 if (igetc(map, ip, &c) < 0)
1485 if (modrm(map, ip, c) < 0)
1487 c = ip->reg; /* secondary op code */
1488 obase = (Optable*)op->proto;
1491 case RMOP: /* R/M field with op code (/digit) */
1492 if (igetc(map, ip, &c) < 0)
1494 if (modrm(map, ip, c) < 0)
1497 obase = (Optable*)op->proto;
1499 case FRMOP: /* FP R/M field with op code (/digit) */
1500 if (igetc(map, ip, &c) < 0)
1502 if (modrm(map, ip, c) < 0)
1504 if ((c&0xc0) == 0xc0)
1505 c = ip->reg+8; /* 16 entry table */
1508 obase = (Optable*)op->proto;
1510 case FRMEX: /* Extended FP R/M field with op code (/digit) */
1511 if (igetc(map, ip, &c) < 0)
1513 if (modrm(map, ip, c) < 0)
1515 if ((c&0xc0) == 0xc0)
1516 c = (c&0x3f)+8; /* 64-entry table */
1519 obase = (Optable*)op->proto;
1521 case RMR: /* R/M register only (mod = 11) */
1522 if (igetc(map, ip, &c) < 0)
1524 if ((c&0xc0) != 0xc0) {
1525 werrstr("invalid R/M register: %x", c);
1528 if (modrm(map, ip, c) < 0)
1531 case RMM: /* R/M register only (mod = 11) */
1532 if (igetc(map, ip, &c) < 0)
1534 if ((c&0xc0) == 0xc0) {
1535 werrstr("invalid R/M memory mode: %x", c);
1538 if (modrm(map, ip, c) < 0)
1541 case PTR: /* Seg:Displacement addr (ptr16:16 or ptr16:32) */
1542 if (ip->osize == 'L') {
1543 if (igetl(map, ip, &ip->disp) < 0)
1546 if (igets(map, ip, &s)< 0)
1548 ip->disp = s&0xffff;
1550 if (igets(map, ip, (ushort*)&ip->seg) < 0)
1554 case AUX: /* Multi-byte op code - Auxiliary table */
1555 obase = (Optable*)op->proto;
1556 if (igetc(map, ip, &c) < 0)
1559 case PRE: /* Instr Prefix */
1560 ip->prefix = (char*)op->proto;
1561 if (igetc(map, ip, &c) < 0)
1564 case SEG: /* Segment Prefix */
1565 ip->segment = (char*)op->proto;
1566 if (igetc(map, ip, &c) < 0)
1569 case OPOVER: /* Operand size override */
1571 if (igetc(map, ip, &c) < 0)
1574 case ADDOVER: /* Address size override */
1576 if (igetc(map, ip, &c) < 0)
1579 case JUMP: /* mark instruction as JUMP or RET */
1581 ip->jumptype = op->operand[i];
1584 werrstr("bad operand type %d", op->operand[i]);
1592 bprint(Instr *ip, char *fmt, ...)
1597 ip->curr = vseprint(ip->curr, ip->end, fmt, arg);
1602 * if we want to call 16 bit regs AX,BX,CX,...
1603 * and 32 bit regs EAX,EBX,ECX,... then
1604 * change the defs of ANAME and ONAME to:
1605 * #define ANAME(ip) ((ip->asize == 'E' ? "E" : "")
1606 * #define ONAME(ip) ((ip)->osize == 'L' ? "E" : "")
1608 #define ANAME(ip) ""
1609 #define ONAME(ip) ""
1611 static char *reg[] = {
1622 static char *breg[] = { "AL", "CL", "DL", "BL", "AH", "CH", "DH", "BH" };
1623 static char *sreg[] = { "ES", "CS", "SS", "DS", "FS", "GS" };
1633 l.offset = ip->disp;
1641 if(findsym(li, CTEXT, &s) < 0)
1645 if(ip->base==SP && lookuplsym(&s, FRAMENAME, &s) >= 0){
1646 /* translate stack offset to offset from plan 9 frame pointer */
1647 /* XXX not sure how to do this */
1650 if(name==nil && findlsym(&s, l, &s) >= 0)
1654 bprint(ip, "%s+", name);
1657 bprint(ip, "%lx(%s)", l.offset, l.reg);
1663 switch(ip->jumptype){
1674 * This is too smart for its own good, but it really is nice
1675 * to have accurate translations when debugging, and it
1676 * helps us identify which code is different in binaries that
1677 * are changed on sources.
1680 issymref(Instr *ip, Symbol *s, long w, long val)
1683 long isstring, size;
1687 if (s->class==CTEXT && w==0)
1689 if (s->class==CDATA) {
1690 /* use first bss symbol (or "end") rather than edata */
1691 if (s->name[0]=='e' && strcmp(s->name, "edata") == 0){
1692 if((indexsym(s->index+1, &tmp) && loccmp(&tmp.loc, &s->loc)==0)
1693 || (indexsym(s->index-1, &tmp) && loccmp(&tmp.loc, &s->loc)==0))
1698 for (next=*s; next.loc.addr==s->loc.addr; next=tmp)
1699 if (!indexsym(next.index+1, &tmp))
1701 size = next.loc.addr - s->loc.addr;
1706 /* huge distances are usually wrong except in .string */
1707 isstring = (s->name[0]=='.' && strcmp(s->name, ".string") == 0);
1708 if (w > 8192 && !isstring)
1710 /* medium distances are tricky - look for constants */
1711 /* near powers of two */
1712 if ((val&(val-1)) == 0 || (val&(val+1)) == 0)
1720 immediate(Instr *ip, long val)
1728 if (findsym(l, CANY, &s) >= 0) {
1729 w = val - s.loc.addr;
1732 if (issymref(ip, &s, w, val)) {
1734 bprint(ip, "%s+%lux(SB)", s.name, w);
1736 bprint(ip, "%s(SB)", s.name);
1739 if (s.class==CDATA && indexsym(s.index+1, &s) >= 0) {
1740 w = s.loc.addr - val;
1744 bprint(ip, "%s-%lux(SB)", s.name, w);
1749 bprint(ip, "%lux", val);
1756 if (ip->osize == 'B')
1757 bprint(ip, breg[(uchar)ip->base]);
1759 bprint(ip, "%s%s", ANAME(ip), reg[(uchar)ip->base]);
1763 bprint(ip, ip->segment);
1764 if (ip->asize == 'E' && (ip->base == SP || ip->base == BP))
1768 immediate(ip, ip->disp);
1770 bprint(ip,"(%s%s)", ANAME(ip), reg[(uchar)ip->base]);
1773 bprint(ip,"(%s%s*%d)", ANAME(ip), reg[(uchar)ip->index], 1<<ip->ss);
1777 prinstr(Instr *ip, char *fmt)
1780 bprint(ip, "%s ", ip->prefix);
1781 for (; *fmt && ip->curr < ip->end; fmt++) {
1790 bprint(ip, "%s", ANAME(ip));
1793 bprint(ip, "CR%d", ip->reg);
1796 if (ip->reg < 4 || ip->reg == 6 || ip->reg == 7)
1797 bprint(ip, "DR%d",ip->reg);
1803 immediate(ip, ip->imm2);
1806 bprint(ip,"%s", ONAME(ip));
1810 immediate(ip,ip->imm);
1813 bprint(ip, "%s%s", ONAME(ip), reg[ip->reg]);
1816 bprint(ip, "%c", ip->osize);
1819 if (ip->reg == 6 || ip->reg == 7)
1820 bprint(ip, "TR%d",ip->reg);
1825 if (ip->osize == 'L')
1831 bprint(ip,"%lux:%lux",ip->seg,ip->disp);
1837 bprint(ip, "F%d", ip->base);
1841 bprint(ip,"%s",sreg[ip->reg]);
1846 immediate(ip, ip->imm+ip->addr+ip->n);
1849 if (ip->osize == 'B')
1850 bprint(ip,"%s",breg[ip->reg]);
1852 bprint(ip, reg[ip->reg]);
1855 if (ip->osize == 'L')
1861 bprint(ip, "%%%c", *fmt);
1865 *ip->curr = 0; /* there's always room for 1 byte */
1869 i386das(Map *map, ulong pc, char modifier, char *buf, int n)
1875 op = mkinstr(map, &instr, pc);
1881 instr.end = buf+n-1;
1882 prinstr(&instr, op->proto);
1887 i386hexinst(Map *map, ulong pc, char *buf, int n)
1892 if (mkinstr(map, &instr, pc) == 0) {
1896 for(i = 0; i < instr.n && n > 2; i++) {
1897 _hexify(buf, instr.mem[i], 1);
1906 i386instlen(Map *map, ulong pc)
1910 if (mkinstr(map, &i, pc))
1916 i386foll(Map *map, Regs *regs, ulong pc, ulong *foll)
1925 op = mkinstr(map, &i, pc);
1931 switch(i.jumptype) {
1932 case RET: /* RETURN or LEAVE */
1933 case Iw: /* RETURN */
1934 if (strcmp(op->proto, "LEAVE") == 0) {
1935 if (lget4(map, regs, locindir("BP", 0), &l) < 0)
1937 } else if (lget4(map, regs, locindir(mach->sp, 0), &l) < 0)
1941 case Iwds: /* pc relative JUMP or CALL*/
1942 case Jbs: /* pc relative JUMP or CALL */
1943 foll[0] = pc+i.imm+i.n;
1946 case PTR: /* seg:displacement JUMP or CALL */
1947 foll[0] = (i.seg<<4)+i.disp;
1949 case JUMP: /* JUMP or CALL EA */
1952 if (rget(regs, reg[(uchar)i.base], &foll[0]) < 0)
1956 /* calculate the effective address */
1959 if (lget4(map, regs, locindir(reg[(uchar)i.base], 0), &l) < 0)
1964 if (lget4(map, regs, locindir(reg[(uchar)i.index], 0), &l) < 0)
1966 addr += l*(1<<i.ss);
1968 /* now retrieve a seg:disp value at that address */
1969 if (get2(map, addr, &s) < 0) /* seg */
1973 if (i.asize == 'L') {
1974 if (get4(map, addr, &l) < 0) /* disp32 */
1977 } else { /* disp16 */
1978 if (get2(map, addr, &s) < 0)
1986 if (strncmp(op->proto,"JMP", 3) == 0 || strncmp(op->proto,"CALL", 4) == 0)