1 /* get FPR and VR use flags with sc 0x7FF3 */
2 /* get vsave with mfspr reg, 256 */
3 
4 .text
5 .align 2
6 
7 .globl	__getmcontext
8 
9 __getmcontext:				/* xxx: instruction scheduling */
10 	mflr	r0
11 	mfcr	r5
12 	mfctr	r6
13 	mfxer	r7
14 	stw	r0, 0*4(r3)
15 	stw	r5, 1*4(r3)
16 	stw	r6, 2*4(r3)
17 	stw	r7, 3*4(r3)
18 
19 	stw	r1, 4*4(r3)
20 	stw	r2, 5*4(r3)
21 	li	r5, 1			/* return value for setmcontext */
22 	stw	r5, 6*4(r3)
23 
24 	stw	r13, (0+7)*4(r3)	/* callee-save GPRs */
25 	stw	r14, (1+7)*4(r3)	/* xxx: block move */
26 	stw	r15, (2+7)*4(r3)
27 	stw	r16, (3+7)*4(r3)
28 	stw	r17, (4+7)*4(r3)
29 	stw	r18, (5+7)*4(r3)
30 	stw	r19, (6+7)*4(r3)
31 	stw	r20, (7+7)*4(r3)
32 	stw	r21, (8+7)*4(r3)
33 	stw	r22, (9+7)*4(r3)
34 	stw	r23, (10+7)*4(r3)
35 	stw	r24, (11+7)*4(r3)
36 	stw	r25, (12+7)*4(r3)
37 	stw	r26, (13+7)*4(r3)
38 	stw	r27, (14+7)*4(r3)
39 	stw	r28, (15+7)*4(r3)
40 	stw	r29, (16+7)*4(r3)
41 	stw	r30, (17+7)*4(r3)
42 	stw	r31, (18+7)*4(r3)
43 
44 	li	r3, 0			/* return */
45 	blr
46 
47 .globl	__setmcontext
48 
49 __setmcontext:
50 	lwz	r13, (0+7)*4(r3)	/* callee-save GPRs */
51 	lwz	r14, (1+7)*4(r3)	/* xxx: block move */
52 	lwz	r15, (2+7)*4(r3)
53 	lwz	r16, (3+7)*4(r3)
54 	lwz	r17, (4+7)*4(r3)
55 	lwz	r18, (5+7)*4(r3)
56 	lwz	r19, (6+7)*4(r3)
57 	lwz	r20, (7+7)*4(r3)
58 	lwz	r21, (8+7)*4(r3)
59 	lwz	r22, (9+7)*4(r3)
60 	lwz	r23, (10+7)*4(r3)
61 	lwz	r24, (11+7)*4(r3)
62 	lwz	r25, (12+7)*4(r3)
63 	lwz	r26, (13+7)*4(r3)
64 	lwz	r27, (14+7)*4(r3)
65 	lwz	r28, (15+7)*4(r3)
66 	lwz	r29, (16+7)*4(r3)
67 	lwz	r30, (17+7)*4(r3)
68 	lwz	r31, (18+7)*4(r3)
69 
70 	lwz	r1, 4*4(r3)
71 	lwz	r2, 5*4(r3)
72 
73 	lwz	r0, 0*4(r3)
74 	mtlr	r0
75 	lwz	r0, 1*4(r3)
76 	mtcr	r0			/* mtcrf 0xFF, r0 */
77 	lwz	r0, 2*4(r3)
78 	mtctr	r0
79 	lwz	r0, 3*4(r3)
80 	mtxer	r0
81 
82 	lwz	r3,	6*4(r3)
83 	blr