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1 /*2 * mpvecdigmulsub(mpdigit *b, int n, mpdigit m, mpdigit *p)3 *4 * p -= b*m5 *6 * each step look like:7 * hi,lo = m*b[i]8 * lo += oldhi + carry9 * hi += carry10 * p[i] += lo11 * oldhi = hi12 *13 * the registers are:14 * hi = DX - constrained by hardware15 * lo = AX - constrained by hardware16 * b = SI - can't be BP17 * p = DI - can't be BP18 * i = BP19 * n = CX - constrained by LOOP instr20 * m = BX21 * oldhi = EX22 *23 */24 .text26 .p2align 2,0x9027 .globl mpvecdigmulsub28 mpvecdigmulsub:29 /* Prelude */30 pushl %ebp /* save on stack */31 pushl %ebx32 pushl %esi33 pushl %edi35 leal 20(%esp), %ebp /* %ebp = FP for now */36 movl 0(%ebp), %esi /* b */37 movl 4(%ebp), %ecx /* n */38 movl 8(%ebp), %ebx /* m */39 movl 12(%ebp), %edi /* p */40 xorl %ebp, %ebp41 pushl %ebp42 _mulsubloop:43 movl (%esi, %ebp, 4),%eax /* lo = b[i] */44 mull %ebx /* hi, lo = b[i] * m */45 addl 0(%esp), %eax /* lo += oldhi */46 jae _mulsubnocarry147 incl %edx /* hi += carry */48 _mulsubnocarry1:49 subl %eax, (%edi, %ebp, 4)50 jae _mulsubnocarry251 incl %edx /* hi += carry */52 _mulsubnocarry2:53 movl %edx, 0(%esp)54 incl %ebp55 loop _mulsubloop56 popl %eax57 subl %eax, (%edi, %ebp, 4)58 jae _mulsubnocarry359 movl $-1, %eax60 jmp done61 _mulsubnocarry3:62 movl $1, %eax63 done:64 /* Postlude */65 popl %edi66 popl %esi67 popl %ebx68 popl %ebp69 ret