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Commit:: af0dea45319aaa8aad011feac472c367165e9020
From:: Russ Cox <rsc@swtch.com>
Date:: Tue May 17 22:48:42 2011 UTC
Message:: SunOS fixes (thanks Aram Hăvărneanu) R=rsc, rsc http://codereview.appspot.com/4271084
Actions:: Patch | Tree
commit - 4e247f10fac36e3234aeb6490a66ac57d9520a4a
commit + af0dea45319aaa8aad011feac472c367165e9020
blob - 50ab9f05f343c1ec682c9f4c11af3e6de5f8bbce
blob + bfdac4caad400244c61ff54fb5881bcca6515611
--- bin/9c
+++ bin/9c
@@ -46,7 +46,7 @@ quiet()
 	grep -v '__p9l_autolib_' $1 |
 	egrep -v "$ignore" |
 	sed 's/ .first use in this function.$//; s/\"\([^\"][^\"]*\)\", line \([0-9][0-9]*\)/\1:\2/g' |
-	uniq 1>&2
+	$(which uniq) 1>&2  # avoid built-in uniq on SunOS
 }
 
 useclang()
blob - 26bea1c3ac2b525eae706dafca58915e87bbcbfc
blob + 35b7e7aa0fa161044db83b750f8f80f68265addd
--- src/cmd/scat/scat.c
+++ src/cmd/scat/scat.c
@@ -1324,21 +1324,21 @@ lookup(char *s, int doreset)
 
 char *ngctypes[] =
 {
-[Galaxy] 		"Gx",
-[PlanetaryN]	"Pl",
-[OpenCl]		"OC",
-[GlobularCl]	"Gb",
-[DiffuseN]		"Nb",
-[NebularCl]	"C+N",
-[Asterism]		"Ast",
-[Knot]		"Kt",
-[Triple]		"***",
-[Double]		"D*",
-[Single]		"*",
-[Uncertain]	"?",
-[Nonexistent]	"-",
-[Unknown]	" ",
-[PlateDefect]	"PD"
+[Galaxy] 		= "Gx",
+[PlanetaryN] 	= "Pl",
+[OpenCl] 		= "OC",
+[GlobularCl] 	= "Gb",
+[DiffuseN]		= "Nb",
+[NebularCl] 	= "C+N",
+[Asterism]		= "Ast",
+[Knot] 		= "Kt",
+[Triple]		= "***",
+[Double]		= "D*",
+[Single]		= "*",
+[Uncertain]	= "?",
+[Nonexistent]	= "-",
+[Unknown]	= " ",
+[PlateDefect]	= "PD"
 };
 
 char*
blob - ab0964615acd346fcefd3588b35ca392bbf533cb
blob + 8c92f61f426fe282f1bacd88133637bcee1ec2e7
--- src/libmp/386/mpvecdigmuladd.s
+++ src/libmp/386/mpvecdigmuladd.s
@@ -1,66 +1,66 @@
-/*
- *	mpvecdigmul(mpdigit *b, int n, mpdigit m, mpdigit *p)
- *
- *	p += b*m
- *
- *	each step look like:
- *		hi,lo = m*b[i]
- *		lo += oldhi + carry
- *		hi += carry
- *		p[i] += lo
- *		oldhi = hi
- *
- *	the registers are:
- *		hi = DX		- constrained by hardware
- *		lo = AX		- constrained by hardware
- *		b+n = SI	- can't be BP
- *		p+n = DI	- can't be BP
- *		i-n = BP
- *		m = BX
- *		oldhi = CX
- *		
- */
+#
+#	mpvecdigmul(mpdigit *b, int n, mpdigit m, mpdigit *p)
+#
+#	p += b*m
+#
+#	each step look like:
+#		hi,lo = m*b[i]
+#		lo += oldhi + carry
+#		hi += carry
+#		p[i] += lo
+#		oldhi = hi
+#
+#	the registers are:
+#		hi = DX		- constrained by hardware
+#		lo = AX		- constrained by hardware
+#		b+n = SI	- can't be BP
+#		p+n = DI	- can't be BP
+#		i-n = BP
+#		m = BX
+#		oldhi = CX
+#		
+ 
 .text
 
 .p2align 2,0x90
 .globl mpvecdigmuladd
 mpvecdigmuladd:
-	/* Prelude */
-	pushl %ebp		/* save on stack */
+	# Prelude 
+	pushl %ebp		# save on stack 
 	pushl %ebx
 	pushl %esi
 	pushl %edi
 
-	leal 20(%esp), %ebp		/* %ebp = FP for now */
-	movl	0(%ebp), %esi		/* b */
-	movl	4(%ebp), %ecx		/* n */
-	movl	8(%ebp), %ebx		/* m */
-	movl	12(%ebp), %edi		/* p */
+	leal 20(%esp), %ebp		# %ebp = FP for now 
+	movl	0(%ebp), %esi		# b 
+	movl	4(%ebp), %ecx		# n 
+	movl	8(%ebp), %ebx		# m 
+	movl	12(%ebp), %edi		# p 
 	movl	%ecx, %ebp
-	negl	%ebp			/* BP = -n */
+	negl	%ebp			# BP = -n 
 	shll	$2, %ecx
-	addl	%ecx, %esi		/* SI = b + n */
-	addl	%ecx, %edi		/* DI = p + n */
+	addl	%ecx, %esi		# SI = b + n 
+	addl	%ecx, %edi		# DI = p + n 
 	xorl	%ecx, %ecx
 _muladdloop:
-	movl	(%esi, %ebp, 4), %eax	/* lo = b[i] */
-	mull	%ebx			/* hi, lo = b[i] * m */
-	addl	%ecx,%eax		/* lo += oldhi */
+	movl	(%esi, %ebp, 4), %eax	# lo = b[i] 
+	mull	%ebx			# hi, lo = b[i] * m 
+	addl	%ecx,%eax		# lo += oldhi 
 	jae	_muladdnocarry1
-	incl	%edx			/* hi += carry */
+	incl	%edx			# hi += carry 
 _muladdnocarry1:
-	addl	%eax, (%edi, %ebp, 4)	/* p[i] += lo */
+	addl	%eax, (%edi, %ebp, 4)	# p[i] += lo 
 	jae	_muladdnocarry2
-	incl	%edx			/* hi += carry */
+	incl	%edx			# hi += carry 
 _muladdnocarry2:
-	movl	%edx, %ecx		/* oldhi = hi */
-	incl	%ebp			/* i++ */
+	movl	%edx, %ecx		# oldhi = hi 
+	incl	%ebp			# i++ 
 	jnz	_muladdloop
 	xorl	%eax, %eax
-	addl	%ecx, (%edi, %ebp, 4)	/* p[n] + oldhi */
-	adcl	%eax, %eax		/* return carry out of p[n] */
+	addl	%ecx, (%edi, %ebp, 4)	# p[n] + oldhi 
+	adcl	%eax, %eax		# return carry out of p[n] 
 
-	/* Postlude */
+	# Postlude 
 	popl %edi
 	popl %esi
 	popl %ebx
blob - 8eec9425cb2f04d49564530175448055ceaf39ee
blob + 017e86c9c4a2acd37c548ad2a6fd5792f8080754
--- src/libmp/386/mpvecdigmulsub.s
+++ src/libmp/386/mpvecdigmulsub.s
@@ -1,54 +1,54 @@
-/*
- *	mpvecdigmulsub(mpdigit *b, int n, mpdigit m, mpdigit *p)
- *
- *	p -= b*m
- *
- *	each step look like:
- *		hi,lo = m*b[i]
- *		lo += oldhi + carry
- *		hi += carry
- *		p[i] += lo
- *		oldhi = hi
- *
- *	the registers are:
- *		hi = DX		- constrained by hardware
- *		lo = AX		- constrained by hardware
- *		b = SI		- can't be BP
- *		p = DI		- can't be BP
- *		i = BP
- *		n = CX		- constrained by LOOP instr
- *		m = BX
- *		oldhi = EX
- *		
- */
+#
+#	mpvecdigmulsub(mpdigit *b, int n, mpdigit m, mpdigit *p)
+#
+#	p -= b*m
+#
+#	each step look like:
+#		hi,lo = m*b[i]
+#		lo += oldhi + carry
+#		hi += carry
+#		p[i] += lo
+#		oldhi = hi
+#
+#	the registers are:
+#		hi = DX		- constrained by hardware
+#		lo = AX		- constrained by hardware
+#		b = SI		- can't be BP
+#		p = DI		- can't be BP
+#		i = BP
+#		n = CX		- constrained by LOOP instr
+#		m = BX
+#		oldhi = EX
+#		
+ 
 .text
 
 .p2align 2,0x90
 .globl mpvecdigmulsub
 mpvecdigmulsub:
-	/* Prelude */
-	pushl %ebp		/* save on stack */
+	# Prelude 
+	pushl %ebp		# save on stack 
 	pushl %ebx
 	pushl %esi
 	pushl %edi
 
-	leal 20(%esp), %ebp		/* %ebp = FP for now */
-	movl	0(%ebp), %esi		/* b */
-	movl	4(%ebp), %ecx		/* n */
-	movl	8(%ebp), %ebx		/* m */
-	movl	12(%ebp), %edi		/* p */
+	leal 20(%esp), %ebp		# %ebp = FP for now 
+	movl	0(%ebp), %esi		# b 
+	movl	4(%ebp), %ecx		# n 
+	movl	8(%ebp), %ebx		# m 
+	movl	12(%ebp), %edi		# p 
 	xorl	%ebp, %ebp
 	pushl %ebp
 _mulsubloop:
-	movl	(%esi, %ebp, 4),%eax	/* lo = b[i] */
-	mull	%ebx			/* hi, lo = b[i] * m */
-	addl	0(%esp), %eax		/* lo += oldhi */
+	movl	(%esi, %ebp, 4),%eax	# lo = b[i] 
+	mull	%ebx			# hi, lo = b[i] * m 
+	addl	0(%esp), %eax		# lo += oldhi 
 	jae	_mulsubnocarry1
-	incl	%edx			/* hi += carry */
+	incl	%edx			# hi += carry 
 _mulsubnocarry1:
 	subl	%eax, (%edi, %ebp, 4)
 	jae	_mulsubnocarry2
-	incl	%edx			/* hi += carry */
+	incl	%edx			# hi += carry 
 _mulsubnocarry2:
 	movl	%edx, 0(%esp)
 	incl	%ebp
@@ -61,7 +61,7 @@ _mulsubnocarry2:
 _mulsubnocarry3:
 	movl	$1, %eax
 done:
-	/* Postlude */
+	# Postlude 
 	popl %edi
 	popl %esi
 	popl %ebx
blob - d568e4fe69e18c7525f8cfab305e80499f3b4f61
blob + 386b2e6c3995be96c68f20e633f727d65480f400
--- src/libsec/386/sha1block.spp
+++ src/libsec/386/sha1block.spp
@@ -158,8 +158,8 @@ _sha1block:
 
 	BODY0(0,FN1,0x5a827999,%eax,TMP1(%esp),%ecx,%edx,%esi)
 	addl $4, %ebx
-	MOVL %ebx, DATA(%esp)	/* data */
-	MOVL TMP1(%esp),%ebx
+	movl %ebx, DATA(%esp)	/* data */
+	movl TMP1(%esp),%ebx
 
 	BODY(4,FN1,0x5a827999,%esi,%eax,%ebx,%ecx,%edx)
 	BODY(8,FN1,0x5a827999,%edx,%esi,%eax,%ebx,%ecx)