Blob


1 /*
2 * mpvecdigmulsub(mpdigit *b, int n, mpdigit m, mpdigit *p)
3 *
4 * p -= b*m
5 *
6 * each step look like:
7 * hi,lo = m*b[i]
8 * lo += oldhi + carry
9 * hi += carry
10 * p[i] += lo
11 * oldhi = hi
12 *
13 * the registers are:
14 * hi = DX - constrained by hardware
15 * lo = AX - constrained by hardware
16 * b = SI - can't be BP
17 * p = DI - can't be BP
18 * i = BP
19 * n = CX - constrained by LOOP instr
20 * m = BX
21 * oldhi = EX
22 *
23 */
24 .text
26 .globl _mpvecdigmulsub
27 _mpvecdigmulsub:
28 /* Prelude */
29 pushl %ebp /* save on stack */
30 pushl %ebx
31 pushl %esi
32 pushl %edi
34 leal 20(%esp), %ebp /* %ebp = FP for now */
35 movl 0(%ebp), %esi /* b */
36 movl 4(%ebp), %ecx /* n */
37 movl 8(%ebp), %ebx /* m */
38 movl 12(%ebp), %edi /* p */
39 xorl %ebp, %ebp
40 pushl %ebp
41 1:
42 movl (%esi, %ebp, 4),%eax /* lo = b[i] */
43 mull %ebx /* hi, lo = b[i] * m */
44 addl 0(%esp), %eax /* lo += oldhi */
45 jae 2f
46 incl %edx /* hi += carry */
47 2:
48 subl %eax, (%edi, %ebp, 4)
49 jae 3f
50 incl %edx /* hi += carry */
51 3:
52 movl %edx, 0(%esp)
53 incl %ebp
54 loop 1b
55 popl %eax
56 subl %eax, (%edi, %ebp, 4)
57 jae 4f
58 movl $-1, %eax
59 jmp 5f
60 4:
61 movl $1, %eax
62 5:
63 /* Postlude */
64 popl %edi
65 popl %esi
66 popl %ebx
67 popl %ebp
68 ret